Highly efficient inexact computing storage device
AssigneeSamsung Electronics Co., Ltd.
InventorYang Seok Ki
Life of this patent
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Abstract
An adaptive mechanism may include a receiver, an Arithmetic Logic Unit (ALU) identifier, and an assignment module. The receiver may receive tasks representing iterations of inexact algorithms. Each task may have a corresponding iteration power level. The ALU identifier may identify a set of available ALUs. Each ALU may have a corresponding ALU power level. The assignment module may assign tasks to available ALUs to optimize a total ALU power used.
Claims21
A system, comprising:
- a receiver to receive at least a task, the task representing an iteration of an inexact algorithm and including a first power level and a first precision;
- an identifier to identify at least an Arithmetic Logic Unit (ALU), the ALU including a second power level and a second precision;
- and
- an assignment module to assign the task to the ALU in order to optimize a total ALU power and to assign the task to the ALU having the second precision that is greater than the first precision.
A method, comprising:
- receiving at least a task, the task representing an iteration of an inexact algorithm and including a first power level and a first arithmetic precision;
- identifying at least an Arithmetic Logic Unit (ALU), the ALU including a second power level and a second arithmetic precision;
- and
- assigning the task to the ALU, wherein the task is assigned to the ALU with the second arithmetic precision that is greater than the first arithmetic precision,
- wherein the assignment of the task to the ALU optimizes total power used by the at least one ALU.
An article, comprising a non-transitory storage medium, the non-transitory storage medium having stored thereon instructions that, when executed by a machine, result in:
- receiving at least a task, the task representing an iteration of an inexact algorithm and including a first power level and a first arithmetic precision;
- identifying at least an Arithmetic Logic Unit (ALU), the ALU including a second power level and a second arithmetic precision;
- and
- assigning the task to the ALU, wherein the task is assigned to the ALU with the second arithmetic precision that is greater than the first arithmetic precision,
- wherein the assignment of the task to the ALU optimizes total power used by the at least one ALU.
Dependencies are inferred from the claim text.