# US 11,113,076 B2 · Coordinating power transitions between a smart interconnect and heterogeneous components > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,113,076 B2 - Document ID: US11113076B2 - Status: Granted - Kind: B2 - Application number: 16/153,607 - Filed: 2018-10-05 - Published: 2019-04-11 - Granted: 2021-09-07 - Earliest claimed: 2017-10-06 - Assignees: North Sea Investment Co. Ltd. - Applicants: North Sea Investment Co. Ltd. - Inventors: Meng Yan; Omar Mahmoud Afdal Alnaggar; Myron O. Shak; Soheil Gharahi; William Kelsey - Web page: https://patentgrep.com/patent/US11113076B2 ## CPC - G06F 9/44505: {Configuring for program initiating, e.g. using registry, configuration files} - G06F 1/24: Resetting means - G06F 1/26: Power supply means, e.g. regulation thereof (for memories G11C) - G06F 13/4282: {on a serial bus, e.g. I2C bus, SPI bus (on daisy chain buses G06F13/4247)} - G06F 21/572: {Secure firmware programming, e.g. of basic input output system [BIOS]} - G06F 21/575: {Secure boot} - G06F 21/81: by operating on the power supply, e.g. enabling or disabling power-on, sleep or resume operations - G06F 2213/0016: Inter-integrated circuit (I2C) - G06F 2221/034: Test or assess a computer or a system - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract Described is an apparatus comprising a semiconductor interconnect substrate and an interface. The semiconductor interconnect substrate may be electrically coupled to one or more components mounted thereon. The interface may be operable to carry a configuration command set to the one or more components in a normal operation mode subsequent to a power-up mode. ## Claims ### Claim 1 An apparatus comprising: a semiconductor interconnect substrate electrically coupled to one or more components mounted thereon, wherein the semiconductor interconnect substrate includes within it a logic to handle sequence and/or control of power functions for the one or more components, wherein the semiconductor interconnect substrate includes within it a microcontroller unit; and an interface coupled to the semiconductor interconnect substrate, wherein the interface is operable to carry a configuration command set to the one or more components in a normal operation mode subsequent to a power-up mode, wherein the logic, to handle sequence and/or control of power functions for the one or more components, comprises: a power management unit; a power kernel and controller coupled to the power management unit, and a memory coupled to the power kernel and controller, wherein the power kernel and controller are operable to sequence one or more reset signals to reset the microcontroller unit, and wherein the semiconductor interconnect substrate includes within it a microelectromechanical system-based temperature compensated crystal oscillator coupled to the microcontroller unit. ### Claim 2 (depends on 1) The apparatus of claim 1, comprising: a controller coupled to the interface and operable to transmit the configuration command set to the interface. ### Claim 3 (depends on 1) The apparatus of claim 1, wherein the configuration command set is a second configuration command set; and wherein the interface is also operable to carry a first configuration command set to the one or more components in the power-up mode. ### Claim 4 (depends on 1) The apparatus of claim 1, wherein the configuration command set encompasses one or more commands to establish a plurality of interface states for the one or more components. ### Claim 5 (depends on 4) The apparatus of claim 4, wherein the configuration command set encompasses a triggering event to apply the plurality of interface states substantially simultaneously. ### Claim 6 (depends on 1) The apparatus of claim 1, wherein the configuration command set encompasses a resistor disconnection command. ### Claim 7 (depends on 1) The apparatus of claim 1, comprising: a strapping pin coupled to the controller; wherein the configuration command set is based upon a logical value of the strapping pin. ### Claim 8 (depends on 1) The apparatus of claim 1, wherein the configuration command set comprises one of: a Serial Peripheral Interface (SPI) command, and an Inter-Integrated Circuit (I2C) command. ### Claim 9 A method comprising: placing a semiconductor interconnect substrate into a power-up mode, the semiconductor interconnect substrate being electrically coupled to one or more components mounted thereon, wherein the semiconductor interconnect substrate includes within it a logic to handle sequence and/or control of power functions for the one or more components, wherein the semiconductor interconnect substrate includes within it a microcontroller unit; and applying a configuration command set to the one or more components in a normal operation mode subsequent to the power-up mode, wherein the logic, to handle sequence and/or control of power functions for the one or more components, comprises: a power management unit; a power kernel and controller coupled to the power management unit, and a memory coupled to the power kernel and controller, wherein the power kernel and controller are operable to sequence one or more reset signals to reset the microcontroller unit, and wherein the semiconductor interconnect substrate includes within it a microelectromechanical system-based temperature compensated crystal oscillator coupled to the microcontroller unit. ### Claim 10 (depends on 9) The method of claim 9, wherein a controller circuitry coupled to the one or more components applies the configuration command set to the one or more components. ### Claim 11 (depends on 9) The method of claim 9, wherein a component mounted on the semiconductor interconnect substrate applies the configuration command set to the one or more components. ### Claim 12 (depends on 9) The method of claim 9, wherein the configuration command set encompasses one or more commands to establish a plurality of interface states for the one or more components. ### Claim 13 (depends on 12) The method of claim 12, wherein the configuration command set encompasses a triggering event to apply the plurality of interface states substantially simultaneously. ### Claim 14 (depends on 9) The method of claim 9, wherein the configuration command set encompasses a resistor disconnection command. ### Claim 15 (depends on 9) The method of claim 9, wherein the configuration command set is a second configuration command set, the method comprising: applying a first configuration command set to the one or more components in the power-up mode. ### Claim 16 (depends on 9) The method of claim 9, wherein the configuration command set includes a command to electrically disconnect a mounted component from the semiconductor interconnect substrate. ### Claim 17 A system comprising a power source and component coupled to the power source, the component including: a semiconductor interconnect substrate electrically coupled to one or more components mounted thereon, wherein the semiconductor interconnect substrate includes within it a logic to handle sequence and/or control of power functions for the one or more components, wherein the semiconductor interconnect substrate includes within it a microcontroller unit; and an interface coupled to the semiconductor interconnect substrate, wherein the interface is operable to carry a configuration command set to the one or more components in a normal operation mode subsequent to a power-up mode, wherein the logic, to handle sequence and/or control of power functions for the one or more components, comprises: a power management unit; a power kernel and controller coupled to the power management unit, and a memory coupled to the power kernel and controller, wherein the power kernel and controller are operable to sequence one or more reset signals to reset the microcontroller unit, and wherein the semiconductor interconnect substrate includes within it a microelectromechanical system-based temperature compensated crystal oscillator coupled to the microcontroller unit. ### Claim 18 (depends on 17) The system of claim 17, comprising: a controller coupled to the interface and operable to transmit the configuration command set to the interface. ### Claim 19 (depends on 17) The system of claim 17, wherein the configuration command set encompasses at least one of: one or more commands to establish a plurality of interface states for the one or more components, a triggering event to apply a plurality of interface states substantially simultaneously, and a resistor disconnection command. ### Claim 20 (depends on 17) The system of claim 17, comprising: a strapping pin coupled to the controller; wherein the configuration command set is based upon a logical value of the strapping pin. ### Claim 21 (depends on 1) The apparatus of claim 1, wherein the power kernel and controller is operable to download system and/or component configuration from the memory. ### Claim 22 (depends on 1) The apparatus of claim 1, wherein the interface is a first interface, and wherein the logic inside the semiconductor interconnect substrate is coupled to the microcontroller unit via a second interface.