Apparatus and method for performing an index operation

A method of performing an index operation, comprising:

• employing vector processing circuitry to perform the index operation in each of a plurality of lanes of parallel processing, the index operation requiring an index value opm to be multiplied by a multiplier value e to produce a multiplication result, where the number of lanes of parallel processing is dependent on a specified element size, and the multiplier value is different, but known, for each lane of parallel processing;
• providing mapping circuitry within the vector processing circuitry to perform, within each lane, mapping operations on the index value opm in order to generate a plurality of intermediate input values, the plurality of intermediate input values being such that addition of the plurality of intermediate input values produces the multiplication result, within each lane the mapping operations being determined by the multiplier value used for that lane;
• and
• performing, within each lane, an addition of at least the plurality of intermediate input values, in order to produce a result vector providing a result value for the index operation performed in each lane.

An apparatus comprising:

• vector processing means for performing an index operation in each of a plurality of lanes of parallel processing, the index operation requiring an index value opm to be multiplied by a multiplier value e to produce a multiplication result, where the number of lanes of parallel processing is dependent on a specified element size, and the multiplier value is different, but known, for each lane of parallel processing;
• the vector processing means comprising:
• mapping means for performing, within each lane, mapping operations on the index value opm in order to generate a plurality of intermediate input values, the plurality of intermediate input values being such that addition of the plurality of intermediate input values produces the multiplication result, within each lane the mapping operations being determined by the multiplier value used for that lane;
• and
• vector adder means for performing, within each lane, an addition of at least the plurality of intermediate input values, in order to produce a result vector providing a result value for the index operation performed in each lane.