# US 11,112,854 B2 · Operating pulsed latches on a variable power supply

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- Number: US 11,112,854 B2
- Document ID: US11112854B2
- Status: Granted
- Kind: B2
- Application number: 16/432,524
- Filed: 2019-06-05
- Published: 2019-09-19
- Granted: 2021-09-07
- Earliest claimed: 2017-01-12
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Steven M. Douskey; Raghu G. Gopalakrishnasetty; Mary P. Kusko; Hari Krishnan Rajeev; James D. Warnock
- Web page: https://patentgrep.com/patent/US11112854B2

## CPC

- G06F 1/3287: by switching off individual functional units in the computer system
- G06F 1/26: Power supply means, e.g. regulation thereof (for memories G11C)
- G06F 1/3296: by lowering the supply or operating voltage
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

Operating pulsed latches on a variable power supply including turning on a first power rail powering a first latch of an integrated circuit, wherein the first latch is a pulsed latch; turning on a second power rail powering a second latch of the integrated circuit, wherein the second latch is operatively coupled to the first latch; performing a scan operation using the first latch and the second latch; turning off the first power rail powering the first latch; and performing a functional operation using the second latch, wherein the first power rail powering the first latch is off during the functional operation.

## Claims

### Claim 1

A method of operating pulsed latches on a variable power supply, the method comprising:
turning on a first power rail powering a first latch of an integrated circuit, wherein the first latch is a pulsed latch, and wherein the first latch is a scan-only latch;
turning on a second power rail powering a second latch of the integrated circuit, wherein the second latch is operatively coupled to the first latch;
performing a scan operation using the first latch and the second latch;
turning off the first power rail powering the first latch; and
responsive to completing the scan operation using the first latch and the second latch, performing a functional operation using the second latch, wherein the first power rail powering the first latch is off during the functional operation.

### Claim 2 (depends on 1)

The method of claim 1, wherein the first latch is one of a plurality of latches powered by the first power rail, and wherein the second latch is one of a plurality of latches powered by the second power rail.

### Claim 3 (depends on 1)

The method of claim 1, wherein the first latch and the second latch are directly connected such that no latch is between the first latch and the second latch.

### Claim 4 (depends on 1)

The method of claim 1, wherein turning off the first power rail powering the first latch comprises turning off components of the integrated circuit utilized during the scan operation and not utilized during the functional operation.

### Claim 5 (depends on 1)

The method of claim 1, wherein the first latch is operatively coupled to the second latch through isolation circuitry that prevents a current draw from the second latch to the first latch while the first power rail is off.

### Claim 6 (depends on 1)

The method of claim 1, wherein turning off the first power rail powering the first latch comprises turning off a plurality of power rails, wherein each of the plurality of power rails powers a plurality of scan-only latches.

### Claim 7 (depends on 1)

The method of claim 1, wherein the first power rail powers a scan data clock, and
wherein turning off the first power rail powering the first latch comprises turning off the scan data clock.

### Claim 8

An apparatus for operating pulsed latches on a variable power supply, the apparatus comprising computer memory having disposed within it computer program instructions that, when executed, cause the apparatus to carry out the steps of:
turning on a first power rail powering a first latch of an integrated circuit, wherein the first latch is a pulsed latch, and wherein the first latch is a scan-only latch;
turning on a second power rail powering a second latch of the integrated circuit, wherein the second latch is operatively coupled to the first latch;
performing a scan operation using the first latch and the second latch;
turning off the first power rail powering the first latch; and
responsive to completing the scan operation using the first latch and the second latch, performing a functional operation using the second latch, wherein the first power rail powering the first latch is off during the functional operation.

### Claim 9 (depends on 8)

The apparatus of claim 8, wherein the first latch is one of a plurality of latches powered by the first power rail, and wherein the second latch is one of a plurality of latches powered by the second power rail.

### Claim 10 (depends on 8)

The apparatus of claim 8, wherein the first latch and the second latch are directly connected such that no latch is between the first latch and the second latch.

### Claim 11 (depends on 8)

The apparatus of claim 8, wherein turning off the first power rail powering the first latch comprises turning off components of the integrated circuit utilized during the scan operation and not utilized during the functional operation.

### Claim 12 (depends on 8)

The apparatus of claim 8, wherein the first latch is operatively coupled to the second latch through isolation circuitry that prevents a current draw from the second latch to the first latch while the first power rail is off.

### Claim 13 (depends on 8)

The apparatus of claim 8, wherein turning off the first power rail powering the first latch comprises turning off a plurality of power rails, wherein each of the plurality of power rails powers a plurality of scan-only latches.

### Claim 14 (depends on 8)

The apparatus of claim 8, wherein the first power rail powers a scan data clock, and
wherein turning off the first power rail powering the first latch comprises turning off the scan data clock.

### Claim 15

A computer program product for operating pulsed latches on a variable power supply, the computer program product disposed upon a non-transitory computer readable medium, the computer program product comprising computer program instructions that, when executed, cause a computer to carry out the steps of:
turning on a first power rail powering a first latch of an integrated circuit, wherein the first latch is a pulsed latch, and wherein the first latch is a scan-only latch;
turning on a second power rail powering a second latch of the integrated circuit, wherein the second latch is operatively coupled to the first latch;
performing a scan operation using the first latch and the second latch;
turning off the first power rail powering the first latch; and
responsive to completing the scan operation using the first latch and the second latch, performing a functional operation using the second latch, wherein the first power rail powering the first latch is off during the functional operation, wherein the first latch and the second latch are directly connected such that no latch is between the first latch and the second latch.

### Claim 16 (depends on 15)

The computer program product of claim 15, wherein the first latch is one of a plurality of latches powered by the first power rail, and wherein the second latch is one of a plurality of latches powered by the second power rail.

### Claim 17 (depends on 15)

The computer program product of claim 15, wherein turning off the first power rail powering the first latch comprises turning off components of the integrated circuit utilized during the scan operation and not utilized during the functional operation.

### Claim 18 (depends on 15)

The computer program product of claim 15, wherein the first latch is operatively coupled to the second latch through isolation circuitry that prevents a current draw from the second latch to the first latch while the first power rail is off.

### Claim 19 (depends on 15)

The computer program product of claim 15, wherein turning off the first power rail powering the first latch comprises turning off a plurality of power rails, wherein each of the plurality of power rails powers a plurality of scan-only latches.
