US 11,112,458 B1Granted

Testing an integrated circuit having conservative reversible logic

AssigneeNXP B.V.

InventorJan-Peter Schat

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Abstract

During a test for integrated circuit aging effects, contents of a first set of flip flop circuits are transferred to a second set of flip flop circuits. A first test value is applied to inputs of a combinatorial logic circuit and outputs from the combinatorial logic circuitry are provided to inputs of the first set of flip flop circuits. The combinatorial logic circuitry is reversible and conservative. The outputs from the first flip flop circuits are compared to the first test value to determine if there is a match. A second test value is applied to the inputs of the combinatorial logic circuitry and the outputs from the combinatorial logic circuitry are provided to inputs of the first set of flip flop circuits. The outputs from the first flip flop circuits are compared to the second test value to determine if there is a match, and when the test mode finishes, contents of the second set of flip flop circuits are transferred to the first set of flip flop circuits.

Claims20

Dependent claims

An integrated circuit device comprising:

enhanced flip flop circuits, each enhanced flip flop circuit including:
a multiplexer having a first input, a second input, an output and a control input coupled to a restore signal;
a first flip flop circuit activated by a clock pulse and including an input coupled to the output of the multiplexer, and an output;
a second flip flop circuit activated by a test_mode signal and including an input coupled to the output of the first flip flop circuit and an output coupled to the first input of the multiplexer;
an output from each of the enhanced flip flop circuits is coupled to the output of the first flip flop circuit;
combinatorial logic circuitry including inputs and outputs, each of the inputs of the combinatorial logic coupled to a corresponding output from one of the enhanced flip flop circuits during a non-test mode and to a test value signal during a test mode, and each of the outputs of the combinatorial logic coupled to the second input of the corresponding one of the enhanced flip flop circuits, wherein the combinatorial logic is reversible by having the same number of outputs as inputs and a bijective transfer function from the inputs to the outputs of the combinatorial logic circuitry, and conservative by having the same number of signals in a logic one state at the outputs and the inputs.

3 more elements

A processing system comprising:

a processor core configured to execute application code;
a test circuit to perform tests that indicate aging effects on the processor core, the test circuit including:
a first set of flip flop circuits;
a second set of flip flop circuits, wherein outputs of the first set of flip flop circuits are connected to corresponding inputs of the second flip flop circuits;
combinatorial logic circuitry having inputs coupled to outputs of the first set of flip flop circuits when not in test mode, and to receive test values during the test mode, wherein the combinatorial logic circuitry is reversible and conservative;
a set of multiplexers with first inputs coupled to corresponding outputs of the second flip flop circuits, second inputs coupled to corresponding outputs of the combinatorial logic circuitry, and outputs coupled to corresponding inputs of the first set of flip flop circuits;
wherein when the test mode begins, contents of the first flip flop circuits are transferred to corresponding ones of the second flip flop circuits, output values from the combinatorial logic circuitry are provided to inputs of the first flip flop circuits, and the outputs of the first flip flop circuits are compared to the test values.

4 more elements

Dependencies are inferred from the claim text.