# US 11,112,361 B2 · Integrated photodetector with direct binning pixel

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- Number: US 11,112,361 B2
- Document ID: US11112361B2
- Status: Granted
- Kind: B2
- Application number: 17/071,833
- Filed: 2020-10-15
- Published: 2021-01-28
- Granted: 2021-09-07
- Earliest claimed: 2016-12-22
- Assignees: Quantum-Si Incorporated
- Applicants: Quantum-Si Incorporated
- Inventors: Jonathan M. Rothberg; Keith G. Fife; David M. Boisvert
- Web page: https://patentgrep.com/patent/US11112361B2

## CPC

- G01N 21/6428: {Measuring fluorescence of fluorescent products of reactions or of fluorochrome labelled reactive substances, e.g. measuring quenching effects, using measuring "optrodes" (in vivo A61B5/00; immunoassay G01N33/53)}
- C12Q 1/6869: Methods for sequencing
- G01N 21/64: Fluorescence; Phosphorescence
- G01N 21/6408: {with measurement of decay time, time resolved fluorescence}
- G01N 21/6454: {using an integrated detector array}
- G01S 7/4865: Time delay measurement, e.g. time-of-flight measurement, time of arrival measurement or determining the exact position of a peak (peak detection in noise, signal conditioning G01S7/487)
- H04N 25/77: Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
- H10F 39/014: {of CMOS image sensors}
- H10F 39/026: {Wafer-level processing}
- H10F 39/151: {Geometry or disposition of pixel elements, address lines or gate electrodes}
- H10F 39/18: Complementary metal-oxide-semiconductor [CMOS] image sensors; Photodiode array image sensors
- H10F 39/802: {Geometry or disposition of elements in pixels, e.g. address-lines or gate electrodes}
- H10F 39/8037: {the integrated elements comprising a transistor}
- G01N 21/6458: {Fluorescence microscopy (fluorescence microscopes per se G02B21/0076 and G02B21/16)}
- G01N: INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES (measuring or testing apparatus or processes other than immunoassay, involving enzymes or microorganisms C12M, C12Q)
- C12Q: MEASURING OR TESTING PROCESSES INVOLVING ENZYMES, NUCLEIC ACIDS OR MICROORGANISMS (immunoassay G01N33/53); COMPOSITIONS OR TEST PAPERS THEREFOR; PROCESSES OF PREPARING SUCH COMPOSITIONS; CONDITION-RESPONSIVE CONTROL IN MICROBIOLOGICAL OR ENZYMOLOGICAL PROCESSES
- G01S: RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- H04N: PICTORIAL COMMUNICATION, e.g. TELEVISION
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION

## Abstract

An integrated circuit includes a photodetection region configured to receive incident photons. The photodetection region is configured to produce a plurality of charge carriers in response to the incident photons. The integrated circuit includes at least one charge carrier storage region. The integrated circuit also includes a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers directly into the at least one charge carrier storage region based upon times at which the charge carriers are produced.

## Claims

### Claim 1

An integrated circuit, comprising:
a photodetection region configured to receive incident photons, the photodetection region being configured to produce a plurality of charge carriers in response to the incident photons;
at least one charge carrier storage region; and
a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers directly from the photodetection region into the at least one charge carrier storage region based upon times at which the plurality of charge carriers are produced.

### Claim 2 (depends on 1)

The integrated circuit of claim 1, further comprising a direct binning pixel, the direct binning pixel comprising the photodetection region, the at least one charge carrier storage region and the charge carrier segregation structure.

### Claim 3 (depends on 2)

The integrated circuit of claim 2, wherein the integrated circuit comprises a plurality of direct binning pixels.

### Claim 4 (depends on 1)

The integrated circuit of claim 1, wherein the at least one charge carrier storage region comprises a plurality of charge carrier storage regions, and the charge carrier segregation structure is configured to aggregate, in the plurality of charge carrier storage regions, charge carriers produced in a plurality of measurement periods.

### Claim 5 (depends on 1)

The integrated circuit of claim 1, wherein the charge carrier segregation structure comprises at least one electrode at a boundary between the photodetection region and a first charge carrier storage region of the at least one charge carrier storage region.

### Claim 6 (depends on 5)

The integrated circuit of claim 5, wherein the charge carrier segregation structure comprises a single electrode at the boundary between the photodetection region and the first charge carrier storage region.

### Claim 7 (depends on 1)

The integrated circuit of claim 1, wherein no charge carrier capture region is present between the photodetection region and a charge carrier storage region of the at least one charge carrier storage region.

### Claim 8 (depends on 1)

The integrated circuit of claim 1, wherein charge carriers are transferred to the at least one charge carrier storage region without capturing the charge carriers between the photodetection region and the at least one charge carrier storage region.

### Claim 9 (depends on 1)

The integrated circuit of claim 1, further comprising a charge carrier rejection region that discards, during a rejection period, charge carriers produced in the photodetection region.

### Claim 10 (depends on 9)

The integrated circuit of claim 9, wherein the discarded charge carriers are removed from the photodetection region in a different direction from a direction in which carriers are directed from the photodetection region toward a charge carrier storage region.

### Claim 11 (depends on 9)

The integrated circuit of claim 9, wherein the charge carrier rejection region discards charge carriers produced in the photodetection region during a rejection period by changing a voltage of an electrode at a boundary between the photodetection region and the charge carrier rejection region.

### Claim 12 (depends on 1)

The integrated circuit of claim 1, wherein single photons are transferred to the at least one charge carrier storage region and aggregated in the at least one charge carrier storage region.

### Claim 13 (depends on 1)

The integrated circuit of claim 1, wherein the photodetection region is formed in an epitaxial region that is less than two microns deep.

### Claim 14 (depends on 1)

The integrated circuit of claim 1, wherein the photodetection region is an epitaxial region comprising a photodiode.

### Claim 15 (depends on 1)

The integrated circuit of claim 1, wherein the at least one charge carrier storage region comprises a plurality of charge carrier storage regions.

### Claim 16

A photodetection method, comprising:
(A) receiving incident photons at a photodetection region; and
(B) selectively directing charge carriers of a plurality of charge carriers produced in response to the incident photons directly from the photodetection region into at least one charge carrier storage region based upon times at which the charge carriers are produced.

### Claim 17 (depends on 16)

The photodetection method of claim 16, wherein (B) is performed at least in part by lowering a potential barrier between the photodetection region and a first charge carrier storage region of the at least one charge carrier storage region.

### Claim 18 (depends on 16)

The photodetection method of claim 16, wherein (B) is performed without capturing the charge carriers between the photodetection region and the at least one charge carrier storage region.

### Claim 19 (depends on 16)

The photodetection method of claim 16, further comprising discarding, during a rejection period, charge carriers produced in the photodetection region.

### Claim 20 (depends on 19)

The photodetection method of claim 19, wherein the discarded charge carriers are removed from the photodetection region in a different direction from a direction in which carriers are directed from the photodetection region toward a charge carrier storage region.