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US 11,108,706 B2Granted
Data transfer circuit, data transfer system, and method for controlling data transfer circuit
AssigneeSony Corporation
InventorToshiaki Shino
Life of this patent
Estimating the term…
Abstract
The number of wiring lines is reduced in a system that transfers data between different power domains. A transmission side buffer starts, at a start timing, processing of sequentially selecting a plurality of transmission side buffer areas and holding transmission data in the areas selected over a predetermined time. A voltage conversion unit performs voltage conversion on the transmission data held and outputs the transmission data as received data. A reception side buffer starts, when a delay time less than the predetermined time has elapsed from the start timing, processing of sequentially selecting a plurality of reception side buffer areas and holding the received data in the areas selected over the predetermined time.
Claims17
A data transfer circuit comprising:
- a transmission side buffer that starts, at a start timing, processing of sequentially selecting a plurality of transmission side buffer areas and holding transmission data in the areas selected over a predetermined time;
- a voltage converter that performs voltage conversion on the transmission data held and outputs the transmission data as received data;
- a reception side buffer that starts, when a delay time less than the predetermined time has elapsed from the start timing, processing of sequentially selecting a plurality of reception side buffer areas and holding the received data in the areas selected over the predetermined time;
- and
- a transmission side controller that starts, at the start timing, the processing of sequentially selecting the plurality of transmission side buffer areas and holding the transmission data in the areas selected over the predetermined time, as transmission side buffering processing, wherein
- the transmission side buffer starts the transmission side buffering processing when an enable signal indicating the start timing is input,
- the transmission side buffer starts a reception side buffering processing when the enable signal is input, and
- the reception side buffer further includes a delay circuit that delays the enable signal and supplies the enable signal delayed to the transmission side controller.
5 more elements
A data transfer system comprising:
- a transmission side buffer that starts, at a start timing, processing of sequentially selecting a plurality of transmission side buffer areas and holding transmission data in the areas selected over a predetermined time;
- a voltage converter that performs voltage conversion on the transmission data held and outputs the transmission data as received data;
- a reception side buffer that starts, when a delay time less than the predetermined time has elapsed from the start timing, processing of sequentially selecting a plurality of reception side buffer areas and holding the received data in the areas selected over the predetermined time;
- a data receiver that processes the received data held;
- and
- a transmission side controller that starts, at the start timing, the processing of sequentially selecting the plurality of transmission side buffer areas and holding the transmission data in the areas selected over the predetermined time, as transmission side buffering processing, wherein
- the transmission side buffer starts the transmission side buffering processing when an enable signal indicating the start timing is input,
- the transmission side buffer starts a reception side buffering processing when the enable signal is input, and
- the reception side buffer further includes a delay circuit that delays the enable signal and supplies the enable signal delayed to the transmission side controller.
6 more elements
A method for controlling a data transfer circuit, the method comprising:
- a transmission side procedure of starting, at a start timing, processing of sequentially selecting a plurality of transmission side buffer areas and holding transmission data in the areas selected over a predetermined time;
- a voltage conversion procedure of performing voltage conversion on the transmission data held and outputs the transmission data as received data;
- and
- a reception side procedure of starting, when a delay time less than the predetermined time has elapsed from the start timing, processing of sequentially selecting a plurality of reception side buffer areas and holding the received data in the areas selected over the predetermined time
- a transmission control procedure that starts, at the start timing, the processing of sequentially selecting the plurality of transmission side buffer areas and holding the transmission data in the areas selected over the predetermined time, as transmission side buffering processing, wherein
- the transmission side procedure starts the transmission side buffering processing when an enable signal indicating the start timing is input,
- the transmission side procedure starts a reception side buffering processing when the enable signal is input, and
- the reception side buffer further includes a delay unit that delays the enable signal and supplies the enable signal delayed for the transmission control procedure.
5 more elements
Dependencies are inferred from the claim text.