Technologies for controlling jitter at network packet egress
AssigneeIntel Corporation
InventorsChih-Jen Chang, Robert Southworth, Naru Dames Sundar, Yue Yang, Charles Michael Atkin, John Leshchuk
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AssigneeIntel Corporation
InventorsChih-Jen Chang, Robert Southworth, Naru Dames Sundar, Yue Yang, Charles Michael Atkin, John Leshchuk
Estimating the term…
Technologies for controlling jitter at network packet egress at a source computing device include determining a switch time delta as a difference between a present switch time and a previously captured switch time upon receipt of a network packet scheduled for transmission to a target computing device and determining a host scheduler time delta as a difference between a host scheduler timestamp associated with the received network packet and a previously captured host scheduler timestamp. The source computing device is additionally configured to determine an amount of previously captured tokens present in a token bucket, determine whether there are a sufficient number of tokens available in the token bucket to transmit the received packet as a function of the switch time delta, the host scheduler time delta, and the amount of previously captured tokens present in the token bucket, and schedule the received network packet for transmission upon a determination that sufficient tokens in the token bucket.
A source computing device for controlling jitter at network packet egress, the source computing device comprising:
One or more non-transitory machine-readable storage media comprising a plurality of instructions stored thereon that, in response to being executed, cause a source computing device to:
Dependencies are inferred from the claim text.