Driver architecture for multiphase and amplitude encoding transmitters

An apparatus for data communication, comprising:

• a plurality of line drivers configured to couple the apparatus to a 3-wire link;
• a data encoder configured to use a combination of 3-phase encoding and pulse amplitude modulation to encode at least 3 bits of binary data in each transition between two symbols that are consecutively transmitted by the plurality of line drivers over the 3-wire link,
• wherein each symbol transmitted over the 3-wire link defines signaling states of the 3-wire link during an associated symbol transmission interval such that each wire of the 3-wire link is in a different signaling state from the other wires of the 3-wire link during the associated symbol transmission interval, and
• wherein each pair of consecutively-transmitted symbols comprises two different symbols;
• and
• a wire state encoder configured to receive a sequence of symbols from the data encoder, and to provide control signals to the plurality of line drivers that cause each of the plurality of line drivers to drive one wire of the 3-wire link to signaling states defined by the sequence of symbols, wherein the control signals configure a plurality of switches in the plurality of line drivers such that each wire of the 3-wire link is coupled to one or more voltage levels through one or more resistors during each symbol transmission interval.

An apparatus for data communication, comprising:

• a plurality of line drivers configured to couple the apparatus to a 3-wire link;
• a data encoder configured to use a combination of 3-phase encoding and pulse amplitude modulation to encode at least 3 bits of binary data in each transition between two symbols that are consecutively transmitted by the plurality of line drivers over the 3-wire link,
• wherein each symbol transmitted over the 3-wire link defines signaling states of the 3-wire link during an associated symbol transmission interval such that each wire of the 3-wire link is in a different signaling state from the other wires of the 3-wire link during the associated symbol transmission interval, and
• wherein each pair of consecutively-transmitted symbols comprises two different symbols;
• and
• a wire state encoder configured to receive a sequence of symbols from the data encoder, and to provide control signals to the plurality of line drivers that cause each of the plurality of line drivers to drive one wire of the 3-wire link to signaling states defined by the sequence of symbols, wherein the control signals configure a plurality of switches in the plurality of line drivers such that each wire of the 3-wire link is coupled to a current driver that provides a current in the each wire, the current having a magnitude defined by a symbol being transmitted in a corresponding symbol transmission interval.

A method for data communication, comprising:

• transmitting a plurality of symbols over a 3-wire link, wherein each symbol defines signaling states of the 3-wire link during an associated symbol transmission interval such that each wire of the 3-wire link is in a different signaling state from the other wires of the 3-wire link during the associated symbol transmission interval;
• encoding at least 3 bits of binary data in each transition between two symbols that are consecutively transmitted over the 3-wire link using a combination of 3-phase encoding and pulse amplitude modulation, wherein each pair of consecutively-transmitted symbols comprises two different symbols;
• and
• providing a first symbol for transmission over the 3-wire link,
• wherein the first symbol is selected from a set of 12 symbols when a first encoding scheme is used, wherein the first symbol is selected from a set of 18 symbols when a second encoding scheme is used, and wherein the first symbol is selected from a set of 42 symbols when a third encoding scheme is used.

A non-transitory processor-readable storage medium comprising code for:

• transmitting a plurality of symbols over a 3-wire link, wherein each symbol defines signaling states of the 3-wire link during an associated symbol transmission interval such that each wire of the 3-wire link is in a different signaling state from the other wires of the 3-wire link during the associated symbol transmission interval;
• encoding at least 3 bits of binary data in each transition between two symbols that are consecutively transmitted over the 3-wire link using a combination of 3-phase encoding and pulse amplitude modulation, wherein each pair of consecutively-transmitted symbols comprises two different symbols;
• providing a first symbol for transmission over the 3-wire link, wherein the first symbol is selected from a set of 12 symbols when a first encoding scheme is used, wherein the first symbol is selected from a set of 18 symbols when a second encoding scheme is used, and wherein the first symbol is selected from a set of 42 symbols when a third encoding scheme is used;
• and
• transmitting a second symbol over the 3-wire link, wherein the second symbol is selected from a set of available symbols that excludes the first symbol.