Memory controller and method of accessing flash memory
AssigneeSilicon Motion, Inc.
InventorShiuan-Hao Kuo
Life of this patent
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AssigneeSilicon Motion, Inc.
InventorShiuan-Hao Kuo
Estimating the term…
A memory controller for use in a data storage device is provided. The memory controller includes a variable-node circuit and a check-node circuit. The check-node circuit is configured to obtain a codeword difference from the variable-node circuit, and calculate a syndrome according to the codeword difference. During each LDPC (low-density parity check) decoding iterative operation, the variable-node circuit executes the following steps: determining syndrome weight according to a channel value and the syndrome from the check-node circuit; obtaining a previous codeword generated by a previous LDPC decoding iterative operation; determining a flipping strategy of a bit-flipping algorithm for each codeword bit in the previous codeword according to the syndrome weight and a predetermined threshold, and flipping one or more codeword bits in the previous codeword according to the flipping strategy to generate an updated codeword; and subtracting the previous codeword from the updated codeword to generate the codeword difference.
A memory controller, for use in a data storage device, the memory controller comprising:
A method of accessing a flash memory, for use in a memory controller of a data storage device, the method comprising:
A memory controller, for use in a data storage device, the memory controller comprising:
Dependencies are inferred from the claim text.