Integrated multiple-path power amplifier with interdigitated transistors

A multiple-path amplifier comprising:

• a semiconductor die;
• first and second amplifier input terminals and an amplifier output terminal integrally-formed with the semiconductor die;
• at least two amplifier cells positioned between the amplifier input terminals and the amplifier output terminal, wherein the at least two amplifier cells are positioned adjacent to each other, and each amplifier cell of the at least two amplifier cells includes:
• a first transistor integrally-formed within the semiconductor die, wherein the first transistor has a first transistor input and a first transistor output, wherein the first transistor input is coupled to the first amplifier input terminal,
• a second transistor integrally-formed within the semiconductor die, wherein the second transistor has a second transistor input and a second transistor output, wherein the second transistor input is coupled to the second amplifier input terminal,
• a combining node coupled to the second transistor output and to the amplifier output terminal, and
• a first phase shift element electrically connected between the first transistor output and the combining node;
• and
• one or more electromagnetic isolation features positioned between the first transistor and the second transistor.

A multiple-path amplifier comprising:

• a semiconductor die;
• first and second amplifier input terminals and an amplifier output terminal integrally-formed with the semiconductor die;
• at least two amplifier cells positioned between the amplifier input terminals and the amplifier output terminal, wherein the at least two amplifier cells are positioned adjacent to each other, and each amplifier cell of the at least two amplifier cells includes:
• a first transistor integrally-formed within the semiconductor die, wherein the first transistor has a first transistor input and a first transistor output, wherein the first transistor input is coupled to the first amplifier input terminal,
• a second transistor integrally-formed within the semiconductor die, wherein the second transistor has a second transistor input and a second transistor output, wherein the second transistor input is coupled to the second amplifier input terminal,
• a combining node coupled to the second transistor output and to the amplifier output terminal, and
• a first phase shift element electrically connected between the first transistor output and the combining node;
• and
• one or more electromagnetic isolation features positioned between adjacent ones of the at least two amplifier cells.

An amplifier comprising:

• a semiconductor die;
• a first input signal manifold positioned at an input-side of the semiconductor die and integrally-formed with the semiconductor die;
• a second input signal manifold positioned at the input-side of the semiconductor die and integrally-formed with the semiconductor die;
• an output signal manifold positioned at an output-side of the semiconductor die and integrally-formed with the semiconductor die;
• and
• at least two amplifier cells positioned between the input-side and the output-side of the semiconductor die, wherein the at least two amplifier cells are positioned adjacent to each other, and each amplifier cell of the at least two amplifier cells includes:
• a first transistor integrally-formed within the semiconductor die, wherein the first transistor has a first transistor input and a first transistor output, wherein the first transistor input is coupled to the first amplifier input terminal,
• a second transistor integrally-formed within the semiconductor die, wherein the second transistor has a second transistor input and a second transistor output, wherein the second transistor input is coupled to the second amplifier input terminal,
• a combining node coupled to the second transistor output and to the amplifier output terminal, and
• a phase shift element electrically connected between the first transistor output and the combining node.