High-efficiency pulse width modulation for switching power converters
AssigneeDialog Semiconductor (UK) Limited
InventorsKevin Yi Cheng Chang, Kelly Consoer
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Abstract
A pulse-width-modulated switching power converter is provided in which a comparator has a boosted speed to determine a trip point at which a ramp signal equals an error signal. In a linear comparator embodiment, a one-shot bias boosting circuit triggers an increased bias current to the linear comparator to boost the speed to determine the trip point. In a sense-amplifier-based comparator embodiment, a clock generator enables the sense-amplifier-based comparator prior to the trip point.
Claims8
A switching power converter pulse width modulator, comprising:
- an error signal generator configured to generate an error signal responsive to a difference between an output voltage and a reference voltage.;
- a ramp signal generator configured to generate a ramp signal;
- a one-shot bias boosting circuit configured to assert a boosting signal over a pre-defined one-shot pulse width responsive to a level-shifted version of the error signal being equal to the ramp signal, wherein the pre-defined one-shot pulse width is smaller than a period for the ramp signal;
- a linear comparator configured to assert a comparator output signal responsive to the ramp signal being equal to the error signal, wherein the linear comparator includes a bias current source configured to increase a bias current for the linear comparator while the boosting signal is asserted, wherein the one-shot bias boosting circuit includes:
- a differential pair of transistors configured to steer a bias current responsive to the level-shifted version of the error signal and the ramp signal;
- a resistive load coupled to the differential pair of transistors;
- and a one-shot circuit configured to pulse the boosting signal over the pre-defined one-shot pulse width responsive to a voltage for a node between a first one of the transistors in the differential pair of transistors and the resistive load.
A switching power converter pulse width modulator, comprising:
- an error signal generator configured to generate an error signal responsive to a difference between an output voltage and a reference voltage;
- a ramp signal generator configured to generate a ramp signal;
- a one-shot bias boosting circuit configured to assert a boosting signal over a pre-defined one-shot pulse width responsive to a level-shifted version of the ramp signal being equal to the error signal, wherein the ,pre-defined one-shot pulse width is smaller than a period for the ramp signal;
- a linear comparator configured to assert a comparator output signal responsive to the ramp signal being equal to the error signal, wherein the linear comparator includes a bias current source configured to increase a bias current for the linear comparator while the boosting signal is asserted, wherein the one-shot bias boosting circuit includes:
- a differential pair of transistors configured to steer a bias current responsive to the error signal and the level-shifted version of ramp signal;
- a resistive load coupled to the differential pair of transistors;
- and a one-shot circuit configured to pulse the boosting signal over the pre-defined one-shot pulse width responsive to a voltage for a node between a first one of the transistors in the differential pair of transistors and the resistive load.
Dependencies are inferred from the claim text.