Back to results
US 11,107,986 B2Granted
Resistive random access memory device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTsai-Hao Hung, Shih-Chi Kuo
Life of this patent
Estimating the term…
Abstract
A memory includes: a first electrode comprising a top boundary and a sidewall; a resistive material layer, disposed above the first electrode, that comprises at least a first portion and a second portion coupled to a first end of the first portion, wherein the resistive material layer presents a variable resistance value; and a second electrode disposed above the resistive material layer.
Claims20
A memory cell, comprising:
- a first dielectric layer;
- a second dielectric layer disposed over the first dielectric layer;
- a first electrode formed in the first dielectric layer and extending into the second dielectric layer, the first electrode comprising a top boundary, a first sidewall, a second sidewall and a bottom boundary;
- a first capping layer formed to surround the top boundary, the first sidewall, the second sidewall and the bottom boundary of the first electrode;
- and
- a variable resistance material layer, disposed above the first capping layer, wherein the variable resistance material layer comprises at least a first portion, a second portion coupled to a first end of the first portion and a third portion coupled to a second end of the first portion, the second end opposite the first end, wherein the first portion of the resistive material layer extends above and parallel to the top boundary of the first electrode and the second portion of the resistive material layer extends parallel to the first sidewall of the first electrode and the third portion of the resistive material layer extends parallel to the second sidewall of the first electrode.
3 more elements
A memory cell, comprising:
- a first dielectric layer;
- a second dielectric layer disposed over the first dielectric layer;
- a first electrode formed in the first dielectric layer and extending into the second dielectric layer, the first electrode comprising a top boundary, a first sidewall, a second sidewall and a bottom boundary;
- a first capping layer formed to surround the top boundary, the first sidewall, the second sidewall and the bottom boundary of the first electrode;
- and
- a resistive material layer conformally disposed over the protruding portion of the first electrode and a top surface of the first dielectric layer, wherein the resistive material layer presents a variable resistance value and wherein the resistive material layer includes a first portion sandwiched between the first and second electrodes, a second portion extending parallel to a first side surface of the first electrode and a third portion extending parallel to a second side surface of the first electrode;
- and
- a second electrode disposed above the resistive material layer.
5 more elements
A method, comprising:
- forming a first dielectric layer;
- forming a second dielectric layer over the first dielectric layer;
- forming a first electrode in the first dielectric layer and extending into the second dielectric layer, the first electrode comprising a top boundary, a first sidewall, a second sidewall and a bottom boundary;
- forming a first capping layer to surround the top boundary, the first sidewall, the second sidewall and the bottom boundary of the first electrode;
- forming a resistive material layer over the first capping layer;
- and
- forming a second electrode extending through a second dielectric layer that overlays the first dielectric layer, wherein the first portion of the resistive material layer is sandwiched between the first and second electrodes.
4 more elements
Dependencies are inferred from the claim text.