Methods of manufacturing three-dimensional arrays with MTJ devices including a free magnetic trench layer and a planar reference magnetic layer

A method of manufacturing a memory cell array comprising:

• forming a first planar non-magnetic insulator layer on a plurality of selectors;
• forming a first plurality of vias through the first planar non-magnetic insulator layer;
• forming a first planar reference magnetic layer on the first planar non-magnetic insulator layer;
• forming a first plurality of trenches through the first planar reference magnetic layer and aligned with the first plurality of vias;
• forming a plurality of portions of a first tunnel insulator layer on the walls of the first plurality of trenches within the first planar reference magnetic layer;
• forming a plurality of portions of a first free magnetic layer in the first plurality trenches within the first planar reference magnetic layer on the plurality of portions of the first tunnel insulator layer in the first plurality of trenches within the first planar reference magnetic layer;
• forming a plurality of first insulator blocks in the plurality of trenches within the first planar reference magnetic layer adjacent the plurality of portions of the first free magnetic layer in the first plurality of trenches within the first planar reference magnetic layer;
• and
• forming a plurality of portions of a first conductive core in the plurality of trenches within the first planar reference magnetic layer between the plurality of first insulator blocks in the first plurality of trenches within the first planar reference magnetic layer.