Method of manufacturing an optoelectronic semiconductor chip and optoelectronic semiconductor chip
AssigneeOSRAM OTPO GmbH
InventorsIsabel Otto, Christian Leirer
Life of this patent
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Abstract
A method of manufacturing an optoelectronic semiconductor chip includes a) providing a semiconductor layer sequence having an active region that generates or receives radiation on a substrate; b) forming at least one recess extending through the active region; c) forming a metallic reinforcement layer on the semiconductor layer sequence by galvanic deposition, the metallic reinforcement layer completely covering the semiconductor layer sequence and at least partially filling the recess; and d) removing the substrate, wherein the metallic reinforcement layer is leveled on a side facing away from the semiconductor layer sequence.
Claims12
A method of manufacturing an optoelectronic semiconductor chip comprising:
- a) providing a semiconductor layer sequence having an active region that generates or receives radiation on a substrate;
- b) forming at least one recess extending through the active region;
- c) forming a metallic reinforcement layer on the semiconductor layer sequence by galvanic deposition, said metallic reinforcement layer completely covering the semiconductor layer sequence and at least partially filling the recess;
- and
- d) removing the substrate, wherein the metallic reinforcement layer is leveled on a side facing away from the semiconductor layer sequence, wherein
- a first semiconductor layer of the semiconductor layer sequence is exposed by the at least one recess and a seed layer is formed prior to forming the metallic reinforcement layer, said seed layer abuts the first semiconductor layer in the at least one recess, and the seed layer is configured to be electrically conductive.
An optoelectronic semiconductor chip comprising:
- a semiconductor body comprising a semiconductor layer sequence having an active region that generates or receives radiation;
- at least one recess extending through the active region;
- a metallic reinforcement layer completely covering the semiconductor layer sequence and at least partially filling the recess;
- wherein the semiconductor chip is free of a growth substrate of the semiconductor layer sequence, and (i) the metallic reinforcement layer forms a carrier of the semiconductor chip or (ii) a carrier is arranged on a side of the metallic reinforcement layer facing away from the semiconductor body,
- the metallic reinforcement layer is leveled on a side facing away from the semiconductor layer sequence, and
- an electrically conductive seed layer abuts a first semiconductor layer of the semiconductor layer sequence in the at least one recess.
Dependencies are inferred from the claim text.