Semiconductor device

A semiconductor device having an active region that includes an effective region and a non-operating region, comprising:

• a semiconductor substrate containing a semiconductor material having a bandgap wider than a bandgap of silicon, the semiconductor substrate having a first main surface and a second main surface opposite to the first main surface;
• a first-conductivity-type region of a first conductivity type, provided in the semiconductor substrate, the first-conductivity-type region having a first side, and a second side opposite to the first side and facing the second main surface of the semiconductor substrate;
• a first second-conductivity-type region of a second conductivity type provided in the semiconductor substrate, the first second-conductivity-type region having a first side, and a second side opposite to the first side and facing the second main surface of the semiconductor substrate, the second side of the first second-conductivity-type region being positioned closer to the first main surface of the semiconductor substrate than is the second side of the first-conductivity-type region and being in contact with the first-conductivity-type region;
• an insulated gate electric field effect transistor having
• a drift region that is formed by the first-conductivity-type region disposed in the effective region,
• a base region that is formed by the first second-conductivity-type region disposed in the effective region,
• a source pad provided on the first main surface of the semiconductor substrate and being electrically connected to the first second-conductivity-type region, the source pad facing the first side of the first second-conductivity-type region in a depth direction orthogonal to the first main surface of the semiconductor substrate, and
• a gate pad provided in the non-operating region, the gate pad being provided on the first main surface of the semiconductor substrate and being apart from the source pad;
• a drain electrode electrically connected to the second main surface of the semiconductor substrate;
• a second second-conductivity-type region of the second conductivity type, provided in the semiconductor substrate in the non-operating region, the second second-conductivity-type region having a first side facing the gate pad in the depth direction, and a second side opposite to the first side and facing the second main surface of the semiconductor substrate, the second side of the second second-conductivity-type region being positioned closer to the first main surface of the semiconductor substrate than is the second side of the first-conductivity-type region and being in contact with the first-conductivity-type region;
• and
• a third second-conductivity-type region of the second conductivity type, provided in the second second-conductivity-type region, an impurity concentration of the third second-conductivity-type region being higher than an impurity concentration of the second second-conductivity-type region, wherein
• the second second-conductivity-type region is electrically connected to the source pad via the third second-conductivity-type region, and has a rectangular planar shape with four corner portions, each of the corner portions having a rounded or chamfered shape in a planar view, and
• the third second-conductivity-type region surrounds a center portion of the second second-conductivity-type region in the planar view.