Hexagonal arrays for quantum dot devices

A quantum computing device, comprising:

• a quantum processing device, wherein the quantum processing device includes a quantum dot device, wherein the quantum dot device includes a quantum well stack,
• a plurality of quantum dot gates above the quantum well stack, and
• a plurality of barrier gates above the quantum well stack,
• wherein the plurality of barrier gates are arranged in electrically continuous first rows and the plurality of quantum dot gates are arranged in electrically continuous second rows parallel to the first rows, and
• wherein either the plurality of barrier gates or the plurality of quantum dot gates are arranged in a triangular lattice;
• a non-quantum processing device, coupled to the quantum processing device, to control electrical signals applied to the plurality of quantum dot gates and the plurality of barrier gates;
• and
• a memory device, to store data generated during operation of the quantum processing device.

A quantum dot device, comprising:

• a quantum well stack;
• and
• a plurality of first gates and a plurality of second gates in an array above the quantum well stack,
• wherein the array is such that, for at least one first gate:
• nearest neighbors for the at least one first gate are gates of the plurality of second gates, and
• second-nearest neighbors for the at least one first gate are other gates of the plurality of first gates, and
• wherein the array includes at least one hexagon of three of the plurality of first gates and three of the plurality of second gates as six vertices of the hexagon, where, in the hexagon, nearest neighbors of each of the three of the plurality of first gates are two gates of the three of the plurality of second gates, and second-nearest neighbors of each of the three of the plurality of first gates are other two gates of the three of the plurality of first gates.