Memory cell with unipolar selectors

An integrated chip, comprising:

• a first unipolar selector disposed within a dielectric structure between a first interconnect and a second interconnect that is over the first interconnect, wherein the second interconnect extends along one or more sidewalls of the first unipolar selector;
• a magnetic tunnel junction (MTJ) device disposed within the dielectric structure between the second interconnect and a third interconnect that is over the second interconnect, wherein the first unipolar selector is configured to allow a first current to flow from the second interconnect to the MTJ device;
• and
• a second unipolar selector disposed within the dielectric structure between the second interconnect and a fourth interconnect over the second interconnect, wherein the second unipolar selector is configured to allow a second current to flow from the MTJ device to the fourth interconnect.

An integrated chip, comprising:

• a magnetic tunnel junction (MTJ) device disposed within a dielectric structure over a substrate, the MTJ device having a MTJ disposed between a first electrode and a second electrode;
• a first unipolar selector disposed within the dielectric structure and coupled to the first electrode, wherein the first unipolar selector is configured to allow current to flow through the MTJ device along a first direction;
• a second unipolar selector disposed within the dielectric structure and coupled to the first electrode, wherein the second unipolar selector is configured to allow current to flow through the MTJ device along a second direction opposite the first direction;
• and
• wherein the first unipolar selector has an uppermost surface that continuously extends from directly below the MTJ device to directly below the second unipolar selector.