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US 11,107,758 B2Granted
Fan-out package structure and method
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTzu-Wei Chiu, Sao-Ling Chiu
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Abstract
A method comprises embedding a semiconductor structure in a molding compound layer, depositing a plurality of photo-sensitive material layers over the molding compound layer, developing the plurality of photo-sensitive material layers to form a plurality of openings, wherein a first portion and a second portion of an opening of the plurality of openings are formed in different photo-sensitive material layers and filling the first portion and the second portion of the opening with a conductive material to form a first via in the first portion and a first redistribution layer in the second portion.
Claims20
A device comprising:
- a semiconductor structure embedded in a molding compound layer, the semiconductor structure comprising a connector;
- a first polymer layer on the molding compound layer;
- a second polymer layer on the first polymer layer;
- a first via portion of a first interconnect structure in the first polymer layer and a first metal line portion of the first interconnect structure in the second polymer layer;
- a third polymer layer on the second polymer layer;
- a fourth polymer layer on the third polymer layer;
- and
- a second via portion of a second interconnect structure in the third polymer layer and a second metal line portion of the second interconnect structure in the fourth polymer layer, an entirety of a bottom surface of the second interconnect structure is in direct contact with a top surface of the first interconnect structure, and the first metal line portion of the first interconnect structure is in direct contact with the first polymer layer, second polymer layer, and third polymer layer.
5 more elements
A device comprising:
- a semiconductor die embedded in a molding compound layer, the semiconductor die comprising a first connector and a second connector, wherein top surfaces of the first and second connectors are level with a top surface of the molding compound layer;
- a first polymer layer contacting the molding compound layer;
- a second polymer layer contacting the first polymer layer;
- a first interconnect comprising a first via portion in the first polymer layer and a first metal line portion in the second polymer layer;
- a second interconnect comprising a second via portion in the first polymer layer and a second metal line portion in the second polymer layer;
- a third polymer layer contacting the second polymer layer;
- a fourth polymer layer contacting the third polymer layer;
- a third interconnect comprising a third via portion in the third polymer layer and a third metal line portion in the fourth polymer layer;
- and
- a fourth interconnect comprising a fourth via portion in the third polymer layer and a fourth metal line portion in the fourth polymer layer, wherein the third interconnect is over the first interconnect and the fourth interconnect is over the second interconnect, wherein a center of the third via portion of the third interconnect is vertically aligned with a center of the first via portion of the first interconnect, wherein a center of the fourth via portion of the fourth interconnect is vertically aligned with a center of the second via portion of the second interconnect.
7 more elements
A device comprising:
- a semiconductor chip surrounded by a molding compound layer, the semiconductor chip comprising a polymer layer;
- a first connector and a second connector in the polymer layer, wherein lower portions of the first connector and the second connector are surrounded by a first passivation layer, and upper portions of the first connector and the second connector are surrounded by the polymer layer;
- a first photo-sensitive layer over the semiconductor chip and molding compound layer;
- a second photo-sensitive layer over the first photo-sensitive layer;
- a first via portion of a first interconnect structure in the first photo-sensitive layer and a first metal line portion of the first interconnect structure in the second photo-sensitive layer, wherein the first via portion contacts the first connector;
- and
- a second via portion of a second interconnect structure in the first photo-sensitive layer and a second metal line portion of the second interconnect structure in the second photo-sensitive layer, wherein the second via portion contacts the second connector.
4 more elements
Dependencies are inferred from the claim text.