Semiconductor device and manufacturing method thereof

A method of manufacturing a semiconductor device including a Fin FET, the method comprising:

• forming a first fin structure and a second fin structure over a substrate, the first and second fin structures extending in a first direction in plan view,
• forming an isolation insulating layer over the substrate so that lower portions of the first and second fin structures are embedded in the isolation insulating layer and upper portions of the first and second fin structures are exposed from the isolation insulating layer;
• forming a gate structure over parts of the first and second tin structures, the gate structure including a gate pattern and a dielectric layer disposed between the gate pattern and the first and second tin structures, the gate structure extending in a second direction crossing the first direction in plan view;
• forming a fin mask layer directly on sidewalls of the first and second fin structures protruding from the isolation insulating layer and directly on an upper surface of the isolation insulating layer, wherein the fin mask layer is a single continuous layer formed by a first portion, a second portion and a center portion, the first portion is formed directly on the sidewall of the first fin structure, the second portion is formed directly on the sidewall of the second fin structure and the center portion is formed directly on the upper surface of the isolation insulating layer between the first fin structure and the second fin structure and connecting the first portion and the second portion;
• forming a recessed first fin structure and a recessed second fin structure by recessing the upper portions of the first and second fin structures such that a lower portion of the fin mask layer disposed on the sidewalls of the first and second fin structures and the center portion of the fin mask layer disposed on the upper surface of the isolation insulating layer between first and second fin structures remain;
• and
• forming a first epitaxial source/drain structure over the recessed first fin structure and a second epitaxial source/drain structure over the recessed second fin structure, wherein:
• the first and second epitaxial source/drain structures are merged thereby forming a merged source/drain structure, and
• a void is formed between the merged source/drain structure and the remaining fin mask layer disposed on the upper surface of the isolation insulating layer.

A method of manufacturing a semiconductor device including a Fin FET, the method comprising:

• forming a first fin structure, a second fin structure and a third fin structure over a substrate, the first, second and third fin structures extending in a first direction in plan view,
• forming an isolation insulating layer over the substrate so that lower portions of the first, second and third fin structures are embedded in the isolation insulating layer and upper portions of the first, second and third fin structures are exposed from the isolation insulating layer;
• forming a gate structure over parts of the first, second and third fin structures, the gate structure including a gate pattern, a dielectric layer disposed between the gate pattern and the first, second and third fin structures, a cap insulating layer disposed over the gate pattern, the gate structure extending in a second direction crossing the first direction in plan view;
• forming a fin mask layer directly on sidewalls of the first, second and third fin structures protruding from the isolation insulating layer and directly on an upper surface of the isolation insulating layer, wherein the fin mask layer is a single continuous layer formed by a first portion, a second portion and a center portion, the first portion is formed directly on the sidewall of the first fin structure, the second portion is formed directly on the sidewall of the second fin structure and the center portion is formed directly on the upper surface of the isolation insulating layer between the first fin structure and the second fin structure and connecting the first portion and the second portion;
• forming a recessed first fin structure, a recessed second fin structure and a recessed third fin structure by recessing the upper portions of the first, second and third fin structures such that lower portions of the fin mask layer disposed on the sidewalls of the first, second and third fin structures and the fin mask layer disposed on the upper surface of the isolation insulating layer between the first fin structure and second fin structure and between the second fin structure and the third fin structure remain;
• and
• forming a first epitaxial source/drain structure over the recessed first fin structure, a second epitaxial source/drain structure over the recessed second fin structure and a third epitaxial source/drain structure over the recessed third fin structure, wherein:
• the first, second and third epitaxial source/drain structures are merged such that a first void is formed between the merged first and second epitaxial source/drain structures, a second void is formed between the merged second and third epitaxial source/drain structures and the remaining fin mask layer on the upper surface of the isolation insulating layer.