Stiffener package and method of fabricating stiffener package
AssigneeAmkor Technology Singapore Holding Pte. Ltd.
InventorsJin Young Kim, Doo Hyun Park, Seung Jae Lee
Life of this patent
Estimating the term…
Abstract
A wafer level fan out package includes a semiconductor die having a first surface, a second surface, and a third surface. A stiffener is disposed on the third surface of the semiconductor die. A conductive via passes through the stiffener. First and second electrically conductive patterns electrically connected to the conductive via are disposed on the first and second surfaces of the semiconductor die and stiffener. Solder balls are electrically connected to the first or second electrically conductive patterns.
Claims20
An electronic package comprising:
- a semiconductor die comprising:
- a first die side;
- a second die side opposite the first die side and comprising a die interconnect (DI), where the die interconnect comprises a first DI side and a second DI side;
- and
- a plurality of lateral die sides that extend between the first die side and the second die side;
- a stiffener positioned laterally outward from each of the plurality of lateral die sides, the stiffener comprising a first stiffener side that is parallel to the first die side, and a second stiffener side that is parallel to the second die side;
- a vertical interconnect structure (VIS) that passes vertically through the stiffener, the vertical interconnect structure comprising a first VIS side, and a second VIS side opposite the first VIS side, where:
- the stiffener laterally surrounds an entirety of the vertical interconnect structure;
- and
- the second VIS side is coplanar with the second DI side and the second stiffener side;
- a first signal distribution structure comprising:
- a first conductor on the first stiffener side, where the first conductor is connected to the first VIS side;
- and
- a first dielectric on the first stiffener side and on the first die side, where:
- the first dielectric contacts the first stiffener side;
- and
- the first dielectric laterally surrounds at least a portion of the first conductor;
- and
- a second signal distribution structure comprising:
- a second conductor on the second stiffener side and on the second die side, where the second conductor is connected to the second VIS side and is electrically connected to the die interconnect;
- and
- a second dielectric on the second stiffener side and on the second die side, where:
- the second dielectric contacts the second stiffener side;
- and
- the second dielectric laterally surrounds at least a portion of the second conductor.
An electronic package comprising:
- a semiconductor die comprising:
- a first die side;
- a second die side opposite the first die side and comprising a die interconnect (DI) side, where the die interconnect comprises a first DI side and a second DI side;
- and
- a plurality of lateral die sides that extend between the first die side and the second die side;
- a stiffener positioned laterally outward from each of the plurality of lateral die sides, the stiffener comprising a first stiffener side that is parallel to the first die side, and a second stiffener side that is parallel to the second die side;
- a vertical interconnect structure (VIS) that passes vertically through the stiffener, the vertical interconnect structure comprising a first VIS side, and a second VIS side opposite the first VIS side, where:
- the stiffener laterally surrounds an entirety of the vertical interconnect structure;
- and
- the first VIS side is approximately flush with the first DI side and the first stiffener side;
- a first signal distribution structure comprising:
- a first conductor on the first stiffener side, where the first conductor is connected to the first VIS side;
- and
- a first dielectric on the first stiffener side and on the first die side, where:
- the first dielectric contacts the first stiffener side;
- and
- the first dielectric laterally surrounds at least a portion of the first conductor;
- and
- a second signal distribution structure comprising:
- a second conductor on the second stiffener side and on the second die side, where the second conductor is connected to the second VIS side and is electrically connected to the die interconnect;
- and
- a second dielectric on the second stiffener side and on the second die side, where:
- the second dielectric contacts the second stiffener side;
- and
- the second dielectric laterally surrounds at least a portion of the second conductor.
A method of manufacturing an electronic package, the method comprising:
- providing a first structure comprising:
- a semiconductor die comprising:
- a first die side;
- a second die side opposite the first die side and comprising a die interconnect (DI) side, where the die interconnect comprises a first DI side and a second DI side;
- and
- a plurality of lateral die sides that extend between the first die side and the second die side;
- a stiffener positioned laterally outward from each of the plurality of lateral die sides, the stiffener comprising a first stiffener side that is parallel to the first die side, and a second stiffener side that is parallel to the second die side;
- and
- a vertical interconnect structure (VIS) that passes vertically through the stiffener, the vertical interconnect structure comprising a first VIS side, and a second VIS side opposite the first VIS side, where:
- the stiffener laterally surrounds an entirety of the vertical interconnect structure;
- and
- the second VIS side is coplanar with the second DI side and the second stiffener side;
- providing a first signal distribution structure comprising:
- a first conductor on the first stiffener side, where the first conductor is connected to the first VIS side;
- and
- a first dielectric on the first stiffener side and on the first die side, where:
- the first dielectric contacts the first stiffener side;
- and
- the first dielectric laterally surrounds at least a portion of the first conductor;
- and
- providing a second signal distribution structure comprising:
- a second conductor on the second stiffener side and on the second die side, where the second conductor is connected to the second VIS side and is electrically connected to the die interconnect;
- and
- a second dielectric on the second stiffener side and on the second die side, where:
- the second dielectric contacts the second stiffener side;
- and
- the second dielectric laterally surrounds at least a portion of the second conductor.
Dependencies are inferred from the claim text.