Leveraging chip variability

A chip comprising:

• a region-specific error profile able to indicate a reliability of each region of the chip for a given operating value, wherein the chip comprises multiple regions;
• the region-specific error profile being used to obtain an indication of reliability of each of the multiple regions of the chip at a target operating value;
• and
• a set of the multiple regions selected based on the indications of reliability of the multiple regions of the chip;
• and
• the selected set of the multiple regions being made available or unavailable.

A method of operating a memory chip, the method comprising:

• providing an error profile for the memory chip, the error profile comprising information that indicates likelihoods of whether arbitrary regions of the memory chip will erroneously store data for given values of an error-sensitive factor of the memory chip, wherein the error-sensitive factor is any one of the following:
• age of the memory chip, temperature, voltage, clock frequency, or refresh rate;
• and
• based on the error profile, prioritizing use of memory regions in the memory chip.