Semiconductor devices and semiconductor systems that operate with strobe signal during test mode

A semiconductor system comprising:

• a first semiconductor device configured to output a chip selection signal, a command/address signal and a clock signal, configured to output first external data and a strobe signal during a write operation in a test mode, and configured to receive second external data to adjust an output moment of the strobe signal during a read operation in the test mode;
• and
• a second semiconductor device configured to be synchronized with the strobe signal to latch input data generated from the first external data during the write operation according to the chip selection signal and the command/address signal and configured to generate output data from the input data and to output the output data as the second external data during the read operation according to the chip selection signal and the command/address signal,
• wherein the test mode is an operation mode for adjusting the output moment of the strobe signal when a logic level combination of the first external data outputted during the write operation is different from a logic level combination of the second external data received during the read operation.