Memory bank power coordination including concurrently performing a memory operation in a selected number of memory regions

An apparatus, comprising:

• a memory comprising a plurality of memory regions each comprising memory cells;
• a power budget register coupled to the memory, the power budget register storing information corresponding to an amount of power available to the plurality of memory regions to concurrently perform a respective PIM operation;
• and
• a controller coupled to the memory and the power budget register, wherein the controller is configured to:
• cause selection of a number of memory regions among the plurality of memory regions to perform the respective processing in memory (PIM) operation, wherein the number of selected memory regions is less than a total number of the plurality of memory regions;
• and
• cause the respective PIM operation to be performed on each of the selected memory regions.

A system, comprising:

• a host;
• a memory coupled to the host and comprising a plurality of memory regions;
• a power budget register coupled to the memory;
• and
• a controller coupled to the memory and the power budget register, wherein the controller is configured to:
• set a counter having a value corresponding to a threshold number of memory regions allowed to perform a respective processing in memory (PIM) operation;
• cause selection of a number of memory regions among the plurality of memory regions to perform a respective processing in memory (PIM) operation, wherein the number of selected memory regions is less than or equal to the threshold number of memory regions allowed to perform the respective PIM operation;
• cause the respective PIM operation to be performed on each of the selected memory regions;
• and
• cause a result of at least one of the respective PIM operations to be stored in at least one of the memory regions without transferring the result of the respective PIM operations to the host.