Display device and method of operating a display device
AssigneeSamsung Display Co., Ltd.
InventorChang-Soo Lee
Life of this patent
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Abstract
A display device includes a display panel including a plurality of gate lines having a desired gate delay time, and a plurality of pixel rows, each of the plurality of pixel rows coupled to a corresponding one of the plurality of gate lines, a gate driver configured to sequentially provide a plurality of gate signals to the plurality of gate lines, a data driver configured to provide data signals to each of the plurality of pixel rows, and a controller configured to control the gate driver to sequentially output the plurality of gate signals and to control the data driver to output the data signals that are delayed by the desired gate delay time of the plurality of gate lines.
Claims18
A display device comprising:
- a display panel including a plurality of gate lines having a desired gate delay time, and a plurality of pixel rows, each of the plurality of pixel rows coupled to a corresponding one of the plurality of gate lines;
- a gate driver configured to sequentially provide a plurality of gate signals to the plurality of gate lines;
- a data driver configured to provide data signals to each of the plurality of pixel rows;
- and a controller configured to control the gate driver in order to sequentially output the plurality of gate signals, and to control the data driver to output the data signals that are delayed by the desired gate delay time of the plurality of gate lines, wherein the plurality of gate lines is designed such that a width of each gate line decreases in a first case where an initial gate delay time of the gate line is shorter than one horizontal time and increases in a second case where the initial gate delay time of the gate line is longer than the one horizontal time.
A method of operating a display device including a display panel, the display panel including a plurality of gate lines and a plurality of pixel rows, each of the plurality of pixel rows coupled to a corresponding one of the plurality of gate lines, the method comprising:
- designing the plurality of gate lines to have a desired gate delay time;
- sequentially providing a plurality of gate signals to the plurality of gate lines;
- delaying data signals by the desired gate delay time of the plurality of gate lines;
- and providing the data signals that are delayed by the desired gate delay time to each of the plurality of pixel rows, wherein the designing the plurality of gate lines includes:
- designing the plurality of gate lines such that a width of each gate line decreases in a first case where an initial gate delay time of the gate line is shorter than one horizontal time;
- and designing the plurality of gate lines such that the width of the gate line increases in a second case where the initial gate delay time of the gate line is longer than the one horizontal time.
Dependencies are inferred from the claim text.