Fast neural network implementations by increasing parallelism of cell computations
AssigneeAsapp, Inc.
InventorTao Lei
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AssigneeAsapp, Inc.
InventorTao Lei
Estimating the term…
The amount of time required to train a neural network may be decreased by modifying the neural network to allow for greater parallelization of computations. The computations for cells of the neural network may be modified so that the matrix-vector multiplications of the cell do not depend on a previous cell and thus allowing the matrix-vector computations to be performed outside of the cells. Because the matrix-vector multiplications can be performed outside of the cells, they can be performed in parallel to decrease the computation time required for processing a sequence of training vectors with the neural network. The trained neural network may be applied to a wide variety of applications, such as performing speech recognition, determining a sentiment of text, determining a subject matter of text, answering a question in text, or translating text to another language.
A computer-implemented method for implementing a neural network, the method comprising:
A system for implementing a neural network, the system comprising:
One or more non-transitory computer-readable media comprising computer executable instructions that, when executed, cause at least one processor to perform actions comprising:
Dependencies are inferred from the claim text.
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Neural networks: learning methods
Complex mathematical operations: matrix or vector computation , e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
Architecture, e.g. interconnection topology: recurrent networks, e.g. Hopfield networks
Recurrent networks, e.g. Hopfield networks: characterised by memory or gating, e.g. long short-term memory [LSTM] or gated recurrent units [GRU]
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A portion of the disclosure of this patent document contains material, which is subject to copyright protection. The copyright owner has no objection to the facsimile reproduction by anyone of the patent document or the patent disclosure, as it appears in the Patent and Trademark Office patent files or records, but otherwise reserves all copyright rights whatsoever.
A Computer Program Listing Appendix is submitted herewith electronically via EFS-Web, the files of which are incorporated herein by reference. The filename, size, and date for the files submitted include: 1. DrQA_README.txt, 1628 bytes, Sep. 25, 2017; 2. DrQA_download.txt, 537 bytes, Sep. 25, 2017; 3. DrQA_drqa_layers.txt, 9071 bytes, Sep. 25, 2017; 4. DrQA_drqa_model.txt, 5679 bytes, Sep. 25, 2017; 5. DrQA_drqa_rnn_reader.txt, 7594 bytes, Sep. 25, 2017; 6. DrQA_drqa_utils.txt, 1299 bytes, Sep. 25, 2017; 7. DrQA_prepro.txt, 12796 bytes, Sep. 25, 2017; 8. DrQA_train.txt, 14267 bytes, Sep. 25, 2017; 9. README.txt, 3371 bytes, Sep. 25, 2017; 10. classification_README.txt, 1652 bytes, Sep. 25, 2017; 11. classification_dataloader.txt, 7134 bytes, Sep. 25, 2017; 12. classification_modules.txt, 2761 bytes, Sep. 25, 2017; 13. classification_train_classifier.txt, 6760 bytes, Sep. 25, 2017; 14. cuda_functional_py.txt, 19394 bytes, Sep. 25, 2017; 15. language_model_README.txt, 1085 bytes, Sep. 25, 2017; 16. language_model_train_lm.txt, 8758 bytes, Sep. 25, 2017; 17. speech_BLSTM_5L.txt, 5681 bytes, Sep. 25, 2017; 18. speech_Bi-SRU_12L.txt, 7458 bytes, Sep. 25, 2017; 19. speech_CNTK_Bi-SRU.txt, 2349 bytes, Sep. 25, 2017; 20. speech_CNTK_Bi-SRU_smbr.txt, 2547 bytes, Sep. 25, 2017; 21. speech_CNTK_SRU.txt, 2237 bytes, Sep. 25, 2017; 22. speech_CNTK_SRU_smbr.txt, 2455 bytes, Sep. 25, 2017; 23. speech_LSTM_5L.txt, 7198 bytes, Sep. 25, 2017; 24. speech_README.txt, 971 bytes, Oct. 20, 2017; 25. speech_SRU_12L.txt, 3729 bytes, Sep. 25, 2017; 26. speech_make_fbank_pitch.txt, 1251 bytes, Sep. 25, 2017; 27. speech_run_bi-sru.txt, 7374 bytes, Sep. 25, 2017; 28. speech_run_sru.txt, 7029 bytes, Sep. 25, 2017; and 29. speech_run_swbd.txt, 9591 bytes, Sep. 25, 2017.
The present invention relates to fast implementations of artificial neural networks.
The invention and the following detailed description of certain embodiments thereof may be understood by reference to the following figures:
FIG. 1 is an example system where a neural network processes a sequence of inputs and generates a sequence of outputs.
FIG. 2 is an example system for training a neural network.
Described herein are techniques for increasing the parallelism of artificial neural networks, which will be referred to herein as simply neural networks. A neural network is a mathematical model that is loosely based on the structure of neural networks in animal brains. Neural networks are typically structured as one or more layers of neurons, where each layer processes the outputs of neurons of a previous layer and whose outputs are processed by neurons of a subsequent layer. The processing of a layer may also include a non-linear process, such as computing a hyperbolic tangent, a sigmoid function, a softmax function, or a rectifier function. The non-linearities of a neural network allow the neural network to provide better performance than linear models.
Some neural networks, such as recurrent neural networks may be implemented as a sequence of cells, where the computations of a subsequent cell depend on one or more outputs of a previous cell. Because the computations of a cell depend on one or more outputs of a previous cell, at least some computations of a cell cannot be performed until the computations of a previous cell have completed. Accordingly, there are limitations to parallelizing the computations of the sequence of cells. Further, because cell computations may include computationally intensive matrix-vector multiplications, the inability to parallelize the cell computations causes the recurrent neural network to require significant computing resources.
Described herein are techniques for increasing the parallelization of cell computations of a neural network, thus increasing the computational efficiency for applications utilizing neural networks. In particular, computational efficiency may be increased by modifying the most demanding part of cell computations (matrix-vector multiplications) to allow those computationally demanding parts to be performed in parallel. The remaining parts of the cell computations that cannot be performed in parallel have lower computational demands, and thus the overall computation time may be significantly decreased. To obtain a neural network that allows for greater parallelization, the structure of the cell computations is modified. In particular, the computations for a cell are modified so that computationally intensive matrix-vector multiplications no longer depend on the previous cell. Modifying the structure of a neural network may also impact the performance of the neural network, but the experiments described below show that the modified neural network is not only more computationally efficient but also provides better performance in some applications.