Verification of hardware design for integrated circuit implementing polynomial input variable function
AssigneeImagination Technologies Limited
InventorsSam Elliott, Robert McKemey, Max Freiburghaus
Life of this patent
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Abstract
Methods and systems for verifying a hardware design for an integrated circuit that implements a function that is polynomial in an input variable x over a set of values of x. The method includes formally verifying that a first instantiation of the hardware design implements a function that is polynomial of degree k in x by formally verifying that for all x in the set of values of x the first instantiation of the hardware design has a constant kth difference; and verifying that a second instantiation of the hardware design generates an expected output in response to each of at least k different values of x in the set of values of x.
Claims19
A computer-implemented method of verifying a hardware design for an integrated circuit that implements a function that is polynomial of degree k in an input variable x over a set of values of x, the set of values of x comprising equally spaced values of x, k being an integer greater than or equal to one, the method comprising in one or more processors:
- formally verifying that a first instantiation of the hardware design implements a function that is polynomial of degree k in x by formally verifying that for all values of x in the set of values of x the first instantiation of the hardware design has a constant kth difference;
- and
- verifying that a second instantiation of the hardware design generates an expected output in response to each of at least e different values of x in the set of values of x, wherein e is equal to k when a value of the kth difference is predetermined and e is equal to k+1 when the value of the kth difference is not predetermined.
A system for verifying a hardware design for an integrated circuit that implements a function that is polynomial of degree k in an input variable x over a set of values of x, the set of values of x comprising equally spaced values of x, k being an integer greater than or equal to one, the system comprising:
- memory configured to store:
- the hardware design, and
- one or more verification tools comprising at least one formal verification tool;
- and
- one or more processors configured to:
- formally verify, using the at least one formal verification tool, that a first instantiation of the hardware design implements a function that is polynomial of degree k in x by formally verifying that for all x in the set of values of x the first instantiation of the hardware design has a constant kth difference, and
- verify, using one of the one or more verification tools, that a second instantiation of the hardware design generates an expected output in response to each of at least e different values of x in the set of values of x, wherein e is equal to k when a value of the kth difference is predetermined and e is equal to k+1 when the value of the kth difference is not predetermined.
Dependencies are inferred from the claim text.