Integrated circuit identification
AssigneeInternational Business Machines Corporation
InventorsAndrea Bahgat Shehata, Peilin Song, Franco Stellari
Life of this patent
Estimating the term…
Abstract
Techniques facilitating integrated circuit identification and reverse engineering are provided. A computer-implemented method can comprise identifying, by a system operatively coupled to a processor, an element within a first elementary cell of one or more elementary cells of an integrated circuit. The method can also comprise matching, by the system, the element with respective elements across the one or more elementary cells including the first elementary cell. The respective elements can be replicas of the element. Further, matching the element with respective elements can be based on a layout analysis of the integrated circuit.
Claims20
A computer-implemented method, comprising:
- matching, by a device operatively coupled to a processor, an element of an elementary cell of a design layout integrated circuit with another element of one or more elementary cells based on a layout analysis of the integrated circuit, wherein the element is associated with the design layout integrated circuit and the other element is associated with a second design layout integrated circuit, wherein the matching is performed to generate mappings between the first design layout integrated circuit and the second design layout integrated circuit;
- and
- displaying, via an interface of the device, a correlation matrix illustrating a correlation between mappings of the first design layout integrated circuit and the second design layout integrated circuit of design layout integrated circuits, wherein display of a vertical axis and a horizontal axis represent design layout integrated circuits and display of intersections represent respective differences in correlations between two design layout integrated circuits.
A system comprising:
- a memory that stores computer executable components;
- and
- a processor that executes the computer executable components stored in the memory, wherein the computer executable components comprise:
- a matching component that matches an element of an elementary cell of a design layout integrated circuit with another element of one or more elementary cells based on a layout analysis of the design layout integrated circuit, wherein the element is associated with the design layout integrated circuit and the other element is associated with a second design layout integrated circuit;
- and
- a sequence component that generates a correlation matrix for display of a correlation between mappings of the first design layout integrated circuit and the second design layout integrated circuit of design layout integrated circuits, wherein display of a vertical axis and a horizontal axis represent design layout integrated circuits and display of intersections represent respective differences in correlations between two design layout integrated circuits.
A computer program product facilitating chip identification, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processing component to cause the processing component to:
- match, by the processing component, an element of an elementary cell of a design layout integrated circuit with another element of one or more elementary cells based on a layout analysis of the design layout integrated circuit, wherein the element is associated with the design layout integrated circuit and the other element is associated with a second design layout integrated circuit;
- and
- display, by the processing component, a correlation matrix illustrating a correlation between mappings of the first design layout integrated circuit and the second design layout integrated circuit of design layout integrated circuits, wherein display of a vertical axis and a horizontal axis represent design layout integrated circuits and display of intersections represent respective differences in correlations between two design layout integrated circuits.
Dependencies are inferred from the claim text.