Memory blockade for verifying system security with respect to speculative execution

A system comprising:

• a test generator configured to:
• generate a plurality of test cases to test exploitation of speculative execution in a design of a computer processor, the plurality of test cases comprising a first test case;
• detect, in the first test case, a branch responsive to an attempted access to secure data;
• and
• responsive to the branch in the first test case, mark each memory address of each memory access dependent on the attempted access to the secure data;
• and
• a simulation environment comprising:
• a logic simulation model, wherein the logic simulation model is a logical representation of the computer processor;
• and
• a simulated memory;
• wherein the simulation environment is configured to execute the first test case over the logic simulation model and the simulated memory, and wherein, to execute the first test case, the simulation environment is configured to:
• detect an attempt to access a memory address that has been marked;
• and
• alert of a security violation responsive to the attempt to access the memory address that has been marked.

A computer-program product for testing a processor design, the computer-program product comprising a computer-readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method comprising:

• generating a plurality of test cases to test exploitation of speculative execution in a design of a computer processor, the plurality of test cases comprising a first test case;
• identifying, in the first test case, a branch responsive to an attempted access to secure data;
• responsive to the branch in the first test case, marking each memory address of each memory access dependent on the attempted access to the secure data;
• and
• executing the first test case over a logic simulation model and a simulated memory, wherein the logic simulation model is a logical representation of the computer processor, and wherein the executing the first test case comprises:
• detecting an attempt to access a memory address that has been marked;
• and
• alerting of a security violation responsive to the attempt to access the memory address that has been marked.