Multi-metal contact structure in microelectronic component

A microelectronic assembly, comprising:

• a first microelectronic component comprising:
• a substrate including a recess or opening extending from a first surface of the substrate, at least a portion of the first surface of the substrate having a planarized topography;
• a first conductive material having a first melting point, disposed within the recess or opening and forming a first portion of an interconnect structure of the microelectronic component, the first portion of the interconnect structure extending normal to a plane of the substrate;
• and
• a second conductive material having a second melting point different from the first melting point, disposed within the recess or opening and forming a second portion of the interconnect structure of the microelectronic component, the second portion of the interconnect structure extending normal to the plane of the substrate and at least partially surrounded by or adjacent to the first conductive material;
• a barrier layer between the substrate and the first conductive material;
• and
• a second microelectronic component having a second interconnect structure bonded to the first interconnect structure by at least one of a direct bond of an insulator material to another insulator material, without an adhesive or by a metal to metal diffusion bond, wherein the first interconnect structure and the second interconnect structure comprise one of an electrical contact pad or a via.

A microelectronic component comprising one or more semiconductor devices, the microelectronic component comprising:

• a substrate including a recess or opening extending from a first surface of the substrate, at least a portion of the first surface of the substrate having a planarized topography;
• a first conductive material having a first coefficient of thermal expansion (CTE), disposed within the recess or opening and forming a first portion of an interconnect structure of the microelectronic component, the first portion of the interconnect structure extending normal to a plane of the substrate;
• a second conductive material having a second CTE different from the first CTE, disposed within the recess or opening and at least partially surrounded by or adjacent to the first conductive material, the second conductive material forming a second portion of the interconnect structure of the microelectronic component, the second portion of the interconnect structure extending normal to the plane of the substrate;
• and
• a barrier layer between the substrate and the first conductive material.

A microelectronic assembly, comprising:

• a first microelectronic component comprising:
• a substrate including a recess or opening extending from a first surface of the substrate, at least a portion of the first surface of the substrate having a planarized topography;
• a first conductive material having a first coefficient of thermal expansion (CTE), disposed within the recess or opening and forming a first portion of an interconnect structure of the microelectronic component;
• a second conductive material having a second CTE different from the first CTE, disposed within the recess or opening and forming a second portion of the interconnect structure of the microelectronic component;
• a barrier layer between the substrate and the first conductive material;
• and
• a second microelectronic component having a second interconnect structure bonded to the first interconnect structure by at least one of a direct bond of an insulator material to another insulator material without an adhesive or by a metal to metal diffusion bond, wherein the first interconnect structure and the second interconnect structure comprise one of an electrical contact pad or a via.