Solid-state imaging device
AssigneeSony Semiconductor Solutions Corporation
InventorAtsumi Niwa
Life of this patent
Estimating the term…
Abstract
To a mounting area in a solid-state imaging device that detects an address event. The solid-state imaging device includes a light receiving chip and a detection chip. In the solid-state imaging device including the light receiving chip and the detection chip, the light receiving chip includes a photodiode that photoelectrically converts incident light and generates a photocurrent. In addition, in the solid-state imaging device, the detection chip quantizes a voltage signal corresponding to the photocurrent generated by the photodiode in the light receiving chip and outputs the voltage signal as a detection signal.
Claims1
A solid-state imaging device comprising:
- a row drive circuit;
- a column drive circuit;
- and
- a plurality of pixels,
- each of the plurality of pixels including
- a photodiode that photoelectrically converts incident light and generates a photocurrent,
- a pixel circuit that quantizes a voltage signal corresponding to the photocurrent and outputs a quantized voltage signal as a detection signal, and
- a connection section,
- the photodiode being arranged on a light receiving chip,
- the row drive circuit and the column drive circuit being arranged on a detection chip, and
- at least a part of the pixel circuit being arranged on the detection chip and being electrically connected to the photodiode arranged on the light receiving chip via the connection section,
- wherein
- in the pixel circuit, a current voltage conversion circuit that converts the photocurrent into the voltage signal is further arranged on the second chip,
- the current voltage conversion circuit includes a first N-type transistor having a gate to which a predetermined bias voltage is applied and a drain connected to a cathode of the photodiode,
- a second N-type transistor having a gate connected to a connection point of the photodiode and the first transistor, a drain connected to a source of the first N-type transistor, and a source grounded, and
- a connection point of the first and second transistors is connected to an input terminal of the buffer.
Dependencies are inferred from the claim text.