US 11,082,065 B2Granted

Data processing apparatus and data processing method using low density parity check encoding for decreasing signal-to-noise power ratio

AssigneeSaturn Licensing LLC

InventorsYuji Shinohara, Makiko Yamamoto

Life of this patent

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Abstract

The present technology relates to a data processing apparatus and a data processing method that are able to provide an LDPC code with a good error rate. An LDPC encoder performs coding by an LDPC code having a code length of 16200 bits and a code rate of 12/15. The LDPC code includes an information bit and a parity bit, and a parity check matrix H is configured with an information matrix portion corresponding to the information bit of the LDPC code and a parity matrix portion corresponding to the parity bit. An information matrix portion of the parity check matrix H is represented by a parity check matrix initial value table representing a position of an element of 1 in the information matrix portion at an interval of 360 columns. The present technology may be applied to a case of performing an LDPC coding and an LDPC decoding.

Claims20

Dependent claims

A transmitting device for generating a digital television broadcast signal, the transmitting device comprising:

circuitry configured to
receive data to be transmitted in a digital television broadcast signal;
perform low density parity check (LDPC) encoding on input bits of the received data according to a parity check matrix of an LDPC code having a code length of 16200 bits and a code rate of 12/15 to generate an LDPC code word, the LDPC code enabling error correction processing to correct errors generated in a transmission path of the digital television broadcast signal,
wherein the LDPC code includes information bits and parity bits, the parity bits being processed by a receiving device to recover information bits corrupted by transmission path errors,
wherein the parity check matrix includes an information matrix portion corresponding to the information bits and a parity matrix portion corresponding to the parity bits,
wherein the information matrix portion is represented by a parity check matrix initial value table, and
wherein the parity check matrix initial value table, having each row indicating positions of elements ‘1’ in corresponding 360 columns of the information matrix portion corresponding to a subset of information bits used in calculating the parity bits in the LDPC encoding, is as follows
3 394 1014 1214 1361 1477 1534 1660 1856 2745 2987 2991
3124 3155
59 136 528 781 803 928 1293 1489 1944 2041 2200 2613
2690 2847
155 245 311 621 1114 1269 1281 1783 1995 2047 2672 2803
2885 3014
79 870 974 1326 1449 1531 2077 2317 2467 2627 2811 3083
3101 3132
4 582 660 902 1048 1482 1697 1744 1928 2628 2699 2728
3045 3104
175 395 429 1027 1061 1068 1154 1168 1175 2147 2359
2376 2613 2682
1388 2241 3118 3148
143 506 2067 3148
1594 2217 2705
398 988 2551
1149 2588 2654
678 2844 3115
1508 1547 1954
1199 1267 1710
2589 3163 3207
1 2583 2974
2766 2897 3166
929 1823 2742
1113 3007 3239
1753 2478 3127
0 509 1811
1672 2646 2984
965 1462 3230
3 1077 2917
1183 1316 1662
968 1593 3239
64 1996 2226
1442 2058 3181
513 973 1058
1263 3185 3229
681 1394 3017
419 2853 3217
3 2404 3175
2417 2792 2854
1879 2940 3235
647 1704 3060,
and
a transmitter transmitting the digital television broadcast signal including the LDPC code word.

48 more elements

A method for generating a digital television broadcast signal comprising:

receiving data to be transmitted in a digital television broadcast signal;
performing low density parity check (LDPC) encoding, in an LDPC encoding circuitry, on input bits of the received data according to a parity check matrix of an LDPC code having a code length of 16200 bits and a code rate of 12/15 to generate an LDPC code word, the LDPC code enabling error correction processing to correct errors generated in a transmission path of the digital television broadcast signal;
wherein the LDPC code word includes information bits and parity bits, the parity bits being processed by a receiving device to recover information bits corrupted by transmission path errors,
the parity check matrix includes an information matrix portion corresponding to the information bits and a parity matrix portion corresponding to the parity bits,
the information matrix portion is represented by a parity check matrix initial value table, and
the parity check matrix initial value table, having each row indicating positions of elements ‘1’ in corresponding 360 columns of the information matrix portion corresponding to a subset of information bits used in calculating the parity bits in the LDPC encoding, is as follows:
3 394 1014 1214 1361 1477 1534 1660 1856 2745 2987 2991
3124 3155
59 136 528 781 803 928 1293 1489 1944 2041 2200 2613
2690 2847
155 245 311 621 1114 1269 1281 1783 1995 2047 2672 2803
2885 3014
79 870 974 1326 1449 1531 2077 2317 2467 2627 2811 3083
3101 3132
4 582 660 902 1048 1482 1697 1744 1928 2628 2699 2728
3045 3104
175 395 429 1027 1061 1068 1154 1168 1175 2147 2359
2376 2613 2682
1388 2241 3118 3148
143 506 2067 3148
1594 2217 2705
398 988 2551
1149 2588 2654
678 2844 3115
1508 1547 1954
1199 1267 1710
2589 3163 3207
1 2583 2974
2766 2897 3166
929 1823 2742
1113 3007 3239
1753 2478 3127
0 509 1811
1672 2646 2984
965 1462 3230
3 1077 2917
1183 1316 1662
968 1593 3239
64 1996 2226
1442 2058 3181
513 973 1058
1263 3185 3229
681 1394 3017
419 2853 3217
3 2404 3175
2417 2792 2854
1879 2940 3235
647 1704 3060;
and
transmitting, by a broadcast transmitter, the digital television broadcast signal including the LDPC code word.

47 more elements

A receiving device comprising:

a receiver configured to receive a digital television broadcast signal including a low density parity check (LDPC) code word of an LDPC code;
and
circuitry configured to:
decode the LDPC code word;
and
process the decoded LDPC code word for presentation of the digital television broadcast signal, wherein the LDPC code has a code length of 16200 bits and a code rate of 12/15 and is based on a parity check matrix initial value table listed is as follows,
3 394 1014 1214 1361 1477 1534 1660 1856 2745 2987 2991
3124 3155
59 136 528 781 803 928 1293 1489 1944 2041 2200 2613
2690 2847
155 245 311 621 1114 1269 1281 1783 1995 2047 2672 2803
2885 3014
79 870 974 1326 1449 1531 2077 2317 2467 2627 2811 3083
3101 3132
4 582 660 902 1048 1482 1697 1744 1928 2628 2699 2728
3045 3104
175 395 429 1027 1061 1068 1154 1168 1175 2147 2359
2376 2613 2682
1388 2241 3118 3148
143 506 2067 3148
1594 2217 2705
398 988 2551
1149 2588 2654
678 2844 3115
1508 1547 1954
1199 1267 1710
2589 3163 3207
1 2583 2974
2766 2897 3166
929 1823 2742
1113 3007 3239
1753 2478 3127
0 509 1811
1672 2646 2984
965 1462 3230
3 1077 2917
1183 1316 1662
968 1593 3239
64 1996 2226
1442 2058 3181
513 973 1058
1263 3185 3229
681 1394 3017
419 2853 3217
3 2404 3175
2417 2792 2854
1879 2940 3235
647 1704 3060.

45 more elements

A method comprising:

receiving a digital television broadcast signal including an LDPC (low density parity check) code word of an LDPC code;
decoding, by decoding circuitry, the LDPC code word;
and
processing the decoded LDPC code word for presentation of the digital television broadcast signal, wherein the LDPC code has a code length of 16200 bits and a code rate of 12/15 and is based on a parity check matrix initial value table listed is as follows,
3 394 1014 1214 1361 1477 1534 1660 1856 2745 2987 2991
3124 3155
59 136 528 781 803 928 1293 1489 1944 2041 2200 2613
2690 2847
155 245 311 621 1114 1269 1281 1783 1995 2047 2672 2803
2885 3014
79 870 974 1326 1449 1531 2077 2317 2467 2627 2811 3083
3101 3132
4 582 660 902 1048 1482 1697 1744 1928 2628 2699 2728
3045 3104
175 395 429 1027 1061 1068 1154 1168 1175 2147 2359
2376 2613 2682
1388 2241 3118 3148
143 506 2067 3148
1594 2217 2705
398 988 2551
1149 2588 2654
678 2844 3115
1508 1547 1954
1199 1267 1710
2589 3163 3207
1 2583 2974
2766 2897 3166
929 1823 2742
1113 3007 3239
1753 2478 3127
0 509 1811
1672 2646 2984
965 1462 3230
3 1077 2917
1183 1316 1662
968 1593 3239
64 1996 2226
1442 2058 3181
513 973 1058
1263 3185 3229
681 1394 3017
419 2853 3217
3 2404 3175
2417 2792 2854
1879 2940 3235
647 1704 3060.

43 more elements

Dependencies are inferred from the claim text.

Facts

Application: 16/550,634Filed 26 Aug 2019 · continuation
Priority: JP 2013-12418712 Jun 2013
Published: US 2019/0379398 A112 Dec 2019
Granted: 3 Aug 2021
Term ends: Not estimatedThe source records don’t support an estimate.

Classification15 codes

H03M 13/118
Structural properties of the code parity-check or generator matrix: parity check matrix structured for simplifying encoding, e.g. by having a…
H03M 13/036
Theoretical methods to calculate these checking codes: heuristic code construction methods, i.e. code construction or code search based on using…
H03M 13/1165
Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices: qC-LDPC codes as defined…
H03M 13/255
Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded…: with…

Family

PCT/JP2014/064672Parent of this continuation · filed 3 Jun 2014
Application15/965,444Parent of this continuation · filed 27 Apr 2018
US 2019/0379398 A1Pre-grant publication · published 12 Dec 2019
US 10,432,225 B2Parent of this continuation
Application14/412,718Parent of this continuation
US 2015/0318868 A1Published application
US 2018/0294822 A1Published application
US 11,082,065 B2This patent

From the US filing history. Foreign family members aren’t listed.