Semiconductor integrated circuit, receiving device, and control method of receiving device

A semiconductor integrated circuit comprising:

• a determination circuit configured to generate first transition information, second transition information, and phase determination information, with respect to a signal level of a modulation signal, the modulation signal making transition between a first signal level, a second signal level, a third signal level, and a fourth signal level, the second signal level being a level higher than the first signal level, the third signal level being a level between the first signal level and the second signal level, the fourth signal level being a level between the third signal level and the second signal level, the first transition information indicating a state of a first transition edge of transition between the first signal level and the second signal level, the second transition information indicating a state of a second transition edge of transition between the third signal level and the fourth signal level, the phase determination information indicating a result of a phase determination of a clock signal;
• and
• an estimation circuit configured to estimate a deviation between a timing of the first transition edge and a timing of the second transition edge according to the first transition information, the second transition information, and the phase determination information.