Bias circuitry and biasing method
AssigneeRealtek Semiconductor Corp.
InventorsJun Yang, Jian Liu
Life of this patent
Estimating the term…
Abstract
A bias circuitry includes a simulation circuit and a level shifter circuit. The simulation circuit is configured to simulate circuit architecture of a processing circuitry, in which the processing circuitry is biased by a bias signal, in order to generate output signals according to input signals. The level shifter circuit is configured to increase a voltage difference between a first node and a second node of the simulation circuit, in which the first node is for tracking an output common mode voltage of the output signals, and the second node is for outputting the bias signal.
Claims20
A bias circuitry, comprising:
- a simulation circuit configured to simulate a circuit architecture of a processing circuitry, wherein the processing circuitry is biased by a bias signal, in order to generate a plurality of output signals according to a plurality of input signals;
- and
- a level shifter circuit configured to increase a voltage difference between a first node and a second node of the simulation circuit, wherein the first node is configured to track an output common mode voltage of the output signals, and the second node is configured to output the bias signal.
A biasing method, comprising:
- simulating a circuit architecture of a processing circuitry by a simulation circuit, wherein the processing circuitry is biased by a bias signal, in order to generate a plurality of output signals according to a plurality of input signals;
- and
- increasing a voltage difference between a first node and a second node of the simulation circuit, wherein the first node is configured to track an output common mode voltage of the output signals, and the second node is configured to output the bias signal.
Dependencies are inferred from the claim text.