GaN transistor with integrated drain voltage sense for fast overcurrent and short circuit protection

A GaN power switching module comprising:

• a GaN power switching device comprising:
• a semiconductor die substrate;
• a GaN integrated circuit comprising a power transistor switch SW_MAIN and an integrated drain voltage sensing circuit, formed monolithically on the semiconductor die substrate;
• the power transistor switch SW_MAIN having a gate width Wg and on-resistance Rdson, and comprising gate, source and drain terminals and a source sense terminal, and the integrated drain voltage sensing circuit having a drain voltage sense terminal;
• the integrated drain voltage sensing circuit comprising a sense transistor switch SW_SEN and a sense resistor RSEN configured as a resistive divider, the sense transistor switch having a source, a drain and a gate, a gate width wg and an on-resistance Ron, and the sense resistor RSEN comprising a transistor configured as a resistor, having a gate width wg and an on-resistance Ron,
• the drain of the sense transistor switch SW_SEN being connected to the drain of the power transistor switch SW_MAIN, the source of the sense transistor switch SW_SEN being connected through the sense resistor RSEN to an intrinsic source of the power transistor switch SW_MAIN, and the gate of the GaN sense transistor switch SW_SEN being connected to the gate of the power transistor switch SW_MAIN;
• and a node between the source of the sense transistor switch SW_SEN and the sense resistor RSEN of the resistive divider being connected to the drain voltage sense output terminal;
• and
• a driver circuit comprising:
• gate driver circuitry for generating a gate drive signal, having a gate drive input terminal and a gate drive output terminal;
• fault detection logic circuitry having a terminal for receiving a drain voltage sense signal VDSEN from the drain voltage sense terminal of the GaN power switching device, and logic circuitry for comparing the drain voltage sense signal VDSEN to a reference voltage Vref and generating a fault signal FLT of a predetermined level when VDSEN exceeds Vref;
• and the fault signal FLT being input to the gate driver circuitry to turn-off of the gate of the power switch SW_MAIN when the fault signal FLT reaches the predetermined level for overcurrent protection.