Semiconductor device and manufacturing method thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorMark Van Dal
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Abstract
A semiconductor device includes a substrate, an N-type bottom vertical gate-all-around (VGAA) transistor, a P-type bottom VGAA transistor, and a top VGAA transistor. The N-type bottom vertical gate-all-around (VGAA) transistor is over the semiconductor substrate and comprising a first nanowire made of InAs. The P-type bottom VGAA transistor is over the semiconductor substrate and comprising a second nanowire made of Ge. The top VGAA transistor is over the N-type bottom VGAA transistor, in which the top VGAA transistor includes a third nanowire in contact with the N-type bottom VGAA transistor, a fourth nanowire on and in contact with the third nanowire, and a bit line wrapping the fourth nanowire.
Claims20
A semiconductor device, comprising:
- a semiconductor substrate;
- an N-type bottom vertical gate-all-around (VGAA) transistor over the semiconductor substrate and comprising a first nanowire made of InAs;
- a P-type bottom VGAA transistor over the semiconductor substrate and comprising a second nanowire made of Ge;
- and
- a top VGAA transistor over the N-type bottom VGAA transistor, wherein the top VGAA transistor comprises:
- a third nanowire in contact with the N-type bottom VGAA transistor;
- a fourth nanowire on and in contact with the third nanowire;
- and
- a bit line wrapping the fourth nanowire.
A semiconductor device, comprising:
- a semiconductor substrate having a first fin and a second fin;
- a first nanowire over the first fin;
- a second nanowire over the second fin, wherein the first nanowire and the second nanowire have different conductivity types;
- a first gate metal layer wrapping around the first nanowire;
- a second gate metal layer wrapping around the second nanowire;
- a third nanowire over and contacts the first nanowire;
- a fourth nanowire over and contacts the second nanowire;
- a first contact metal wrapping around third nanowire;
- and
- a second contact metal wrapping around the fourth nanowire.
A semiconductor device, comprising:
- a semiconductor substrate having a fin;
- a first nanowire over the fin, wherein a lengthwise direction of the first nanowire is substantially vertical to a top surface of the fin;
- a first gate structure wrapping around the first nanowire;
- a second nanowire over and contacting the first nanowire;
- a contact metal wrapping around second nanowire;
- a third nanowire over and contacting the second nanowire;
- a second gate structure wrapping around the third nanowire;
- and
- a fourth nanowire over and contacting the third nanowire.
Dependencies are inferred from the claim text.