High-voltage semiconductor devices and methods for manufacturing the same

A high-voltage semiconductor device, comprising:

• a semiconductor substrate having a first conductivity type;
• a first high-voltage well region disposed in the semiconductor substrate and having a second conductivity type that is opposite to the first conductivity type;
• a first buried layer disposed on the first high-voltage well region and having the first conductivity type;
• a second high-voltage well region disposed on the first buried layer and having the second conductivity type;
• and
• a source region and a first drain region disposed in the second high-voltage well region and having the second conductivity type;
• a second buried layer disposed on the first high-voltage well region and having the second conductivity type, wherein the second buried layer adjoins the first buried layer, and the first high-voltage well region extends below the second buried layer, the first buried layer is in direct contact with the second buried layer, and a bottom surface of the second buried layer is in direct contact with both the first high-voltage well region and the semiconductor substrate.

A method for manufacturing a high-voltage semiconductor device, further comprising:

• forming a first high-voltage well region in a semiconductor substrate, wherein the semiconductor substrate has a first conductivity type, and the first high-voltage well region has a second conductivity type that is opposite to the first conductivity type;
• forming a first buried layer on the first high-voltage well region, wherein the first buried layer has the first conductivity type;
• forming a second buried layer and a third buried layer at opposite sides of the first buried layer, wherein the second buried layer and the third buried layer have the second conductivity type, the first buried layer is in direct contact with the second buried layer, and bottom surfaces of the second buried layer and the third buried layer are in direct contact with both the first high-voltage well region and the semiconductor substrate;
• forming an epitaxial layer on the semiconductor substrate, wherein the first buried layer, the second buried layer and the third buried layer extend into the epitaxial layer;
• and
• forming a source region and a drain region in the epitaxial layer and on the first buried layer, wherein the source region and the drain region have the second conductivity type.