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US 11,081,572 B2Granted
Integrated circuit heat dissipation using nanostructures
AssigneeInternational Business Machines Corporation
InventorsAlan B. Botula, Max L. Lifson, James A. Slinkman, Theodore G. Van Kessel, Randy L. Wolf
Life of this patent
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Abstract
An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer.
Claims19
A method, comprising:
- forming a barrier layer on a surface of a field effect transistor;
- forming an electrically conductive layer directly contacting the barrier layer;
- forming a plurality of nanowire structures on a surface of the electrically conductive layer of the field effect transistor by applying an electric potential to the electrically conductive layer through a wiring path;
- and
- forming a discontinuity in the wiring path after the plurality of nanowire structures are formed,
- wherein the plurality of nanowire structures comprises a first set of nanowires on a source region of the field effect transistor and a second set of nanowires on a drain region of the field effect transistor.
3 more elements
A method, comprising:
- forming a barrier layer on an entire surface of a semiconductor structure;
- etching a portion of the barrier layer on a drain region of the semiconductor structure;
- depositing an insulator layer on the drain region;
- depositing an electrically conductive layer on the insulator layer;
- and
- forming a plurality of nanowire structures on a surface of the electrically conductive layer of the semiconductor structure, wherein the barrier layer is formed before forming the plurality of nanowire structures.
3 more elements
Dependencies are inferred from the claim text.