Backside contact of a semiconductor device
AssigneeQUALCOMM Incorporated
InventorsQingqing Liang, Sivakumar Kumarasamy, George Pete Imthurn, Sinan Goktepeli
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Abstract
Certain aspects of the present disclosure generally relate to a semiconductor device having a backside gate contact. An example semiconductor device generally includes a transistor disposed above a substrate, wherein the transistor comprises a gate region, a channel region, a source region, and a drain region and wherein the gate region is disposed adjacent to the channel region. The semiconductor device further includes a backside gate contact that is electrically coupled to a bottom surface of the gate region and that extends below a bottom surface of the substrate.
Claims20
A semiconductor device comprising:
- a transistor disposed above a substrate, wherein the transistor comprises a gate region, a channel region, a source region, and a drain region, wherein the gate region is disposed adjacent to the channel region, and wherein the gate region comprises:
- a first portion disposed above a portion of an upper surface of the channel region;
- and
- a second portion extending orthogonally from the first portion and disposed adjacent to a portion of a first lateral surface of the channel region;
- and
- a backside gate contact that is electrically coupled to a bottom surface of the second portion of the gate region and that extends below a bottom surface of the substrate.
A method of fabricating a semiconductor device, comprising:
- forming a transistor above a substrate, wherein the transistor comprises a gate region, a channel region, a source region, and a drain region, wherein the gate region is adjacent to the channel region, and wherein the gate region comprises:
- a first portion disposed above a portion of an upper surface of the channel region;
- and
- a second portion extending orthogonally from the first portion and disposed adjacent to a portion of a first lateral surface of the channel region;
- and
- forming a backside gate contact that is electrically coupled to a bottom surface of the second portion of the gate region and that extends below a bottom surface of the substrate.
Dependencies are inferred from the claim text.