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US 11,081,546 B2Granted
Isolation structure for stacked vertical transistors
AssigneeInternational Business Machines Corporation
InventorsJuntao Li, Kangguo Cheng, Chen Zhang, Zhenxing Bi
Life of this patent
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Abstract
A method for manufacturing a semiconductor device includes forming a first vertical transistor on a semiconductor substrate, and forming a second vertical transistor stacked on the first vertical transistor. In the method, an isolation layer is formed between the first and second vertical transistors. The isolation layer includes a rare earth oxide.
Claims20
A method for manufacturing a semiconductor device, comprising:
- forming a first vertical transistor comprising a first lower source/drain region and a first upper source/drain region on a semiconductor substrate;
- forming a second vertical transistor comprising a second lower source/drain region and a second upper source/drain region stacked on the first vertical transistor;
- forming an isolation layer between the first and second vertical transistors, wherein the isolation layer comprises a rare earth oxide;
- and
- laterally etching the first and second upper and lower source/drain regions to recess lateral side surfaces of first and second upper and lower source/drain regions;
- wherein the isolation layer is formed between the first upper source/drain region and the second lower source/drain region;
- and
- wherein the isolation layer has a greater lateral width than a lateral width of the first upper source/drain region and a lateral width of the second lower source/drain region.
5 more elements
A method for manufacturing a stacked vertical transistor device, comprising:
- forming a first lower source/drain region on a semiconductor substrate;
- forming a first channel region extending vertically from the first lower source/drain region;
- forming a first upper source/drain region on an upper portion of the first channel region;
- forming a first gate region around the first channel region;
- forming an isolation layer on the first upper source/drain region;
- forming a second lower source/drain region on the isolation layer;
- forming a second channel region extending vertically from the second lower source/drain region;
- forming a second upper source/drain region on an upper portion of the second channel region;
- forming a second gate region around the second channel region;
- and
- laterally etching the first and second upper and lower source/drain regions to recess lateral side surfaces of first and second upper and lower source/drain regions;
- wherein the isolation layer is formed between the first upper source/drain region and the second lower source/drain region;
- wherein the isolation layer has a greater lateral width than a lateral width of the first upper source/drain region and a lateral width of the second lower source/drain region;
- and
- wherein the isolation layer comprises a rare earth oxide.
12 more elements
Dependencies are inferred from the claim text.