IC unit and method of manufacturing the same, and electronic device including the same

A method of manufacturing an Integrated Circuit (IC) unit, comprising:

• providing a stack of a first source/drain layer, a channel layer and a second source/drain layer for a first device and a first source/drain layer, a channel layer and a second source/drain layer for a second device on a substrate;
• selectively etching the channel layer of the second device and the channel layer of the first device, so that the channel layer of the second device has its periphery recessed inwards with respect to that of the first and second source/drain layers of the second device, and that the channel layer of the first device has its periphery recessed inwards with respect to that of the first and second source/drain layers of the first device and is separated into a first portion and a second portion spaced apart from each other;
• forming a first sacrificial gate and a second sacrificial gate in the recess of the channel layer of the first device with respect to the first source/drain layer of the second device and the second source/drain layer of the first device and in the recess of the channel layer of the second device with respect to the second source/drain layer of the second device, respectively;
• forming an insulating spacer between either or both of the first sacrificial gate and the second sacrificial gate and at least one of the first source/drain layer or the second source/drain layer adjacent thereto;
• and
• replacing the first sacrificial gate and the second sacrificial gate with a first gate stack and a second gate stack to surround the periphery of the respective channel layers of the first device and the second device, respectively, wherein the channel layer of the second device is substantially coplanar with the second gate stack.