Stacked die multichip module package

A multichip module (MCM) power package, comprising:

• a multilayer routable lead frame substrate (MRLF substrate) including a first routable lead frame (RLF) layer and at least a second RLF layer, the MRLF substrate having a top side and a bottom side with a multilayer extending via extending from a top side of the first RLF layer at least into the second RLF layer;
• a first vertical power field effect transistor (FET) including a first drain and a first source, wherein a side of the first vertical power FET is flipchip attached to a bottom side of the second RLF layer;
• a second vertical power (FET) including a second drain and a second source, wherein a side of the second vertical power FET having the second source is flipchip attached to the bottom side of the second RLF layer lateral to the first vertical power FET and is contacting the multilayer extending via;
• a controller integrated circuit (IC) including a gate driver flipchip attached to the top side of the MRLF substrate positioned at least partially over the first vertical power FET;
• a top mold compound on the top side of the MRLF substrate lateral to the controller IC and lateral to a metal pad on the multilayer extending via, and
• a bottom mold compound layer on the bottom side of the second RLF layer, wherein a bottom side of the first vertical power FET and the second vertical power FET are both exposed by the bottom mold compound layer.

A multichip module (MCM) packaging method, comprising:

• flipchip attaching an integrated circuit (IC) onto a two-dimensional (2D) array of multilayer molded routable lead frame substrates (MRLF substrate) each including a first routable lead frame (RLF) layer and at least a second RLF layer having a top side and a bottom side including a multilayer extending via that extends from the top side at least into the second RLF layer;
• forming a metal pad over the multilayer extending via;
• molding to form a top mold compound layer on the second RLF layer to expose the IC and the metal pad;
• flipchip attaching a first vertical device and a second vertical device to the bottom side of the second RLF layer;
• molding to form a bottom mold compound layer on the bottom side of the second RLF layer after the flipchip attaching, wherein bottom sides of the first and second vertical devices are exposed by the bottom mold compound layer, and
• singulating the array of MRLF substrates to generate a plurality of stacked die MCM power packages.