Stacked die package including a first die coupled to a substrate through direct chip attachment and a second die coupled to the substrate through wire bonding and related methods, devices and apparatuses

A method of forming a stacked die device comprising:

• disposing a first integrated circuit die over a substrate with an active surface of the first integrated circuit die facing an upper surface of the substrate;
• electrically coupling the first integrated circuit die to the substrate via direct chip attachment (DCA) interconnects;
• disposing a second integrated circuit die over the first integrated circuit die with a back side surface of the second integrated circuit die facing a back side surface of the first integrated circuit die;
• and
• electrically coupling the second integrated circuit die directly to the substrate via first wire bonds;
• wherein the first integrated circuit die is electrically coupled to the second integrated circuit die through the substrate.

A stacked die package, comprising:

• a substrate;
• a first memory die over the substrate having an active surface comprising an in-line redistribution layer (iRDL) facing an upper surface of the substrate, wherein the first memory die is communicatively coupled to the substrate via direct chip attachment (DCA) fcaturcsinterconnects;
• and
• a second memory die over the first memory die with an active surface facing away from the first memory die, wherein the second memory die is directly coupled to the substrate via first wire bonds;
• wherein the first memory die is communicatively coupled to the second memory die through the substrate.

An electronic system comprising:

• at least one input device;
• at least one output device;
• at least one processor device operably coupled to the input device and the output device;
• and
• at least one memory device operably coupled to the at least one processor device and comprising:
• a substrate bearing a first memory die having a downward-facing active surface, the first memory die and the substrate operably coupled by direct chip attachment (DCA) interconnects;
• and
• a second memory die located above the first memory die and operably directly coupled to the substrate by wire bonds;
• wherein the first memory die is operably coupled to the second memory die through the substrate.