Semiconductor package and methods of manufacturing a semiconductor package
AssigneeInfineon Technologies Austria AG
InventorsThomas Feil, Danny Clavette, Paul Ganitzer, Martin Poelzl, Carsten von Koblinski
Life of this patent
Estimating the term…
Loading patent…
AssigneeInfineon Technologies Austria AG
InventorsThomas Feil, Danny Clavette, Paul Ganitzer, Martin Poelzl, Carsten von Koblinski
Estimating the term…
In an embodiment, a semiconductor package includes a first transistor device having first and second opposing surfaces, a first power electrode and a control electrode arranged on the first surface and a second power electrode arranged on the second surface. A first metallization structure arranged on the first surface includes a plurality of outer contact pads which includes a protective layer of solder, Ag or Sn. A second metallization structure is arranged on the second surface. A conductive connection extending from the first surface to the second surface electrically connects the second power electrode to an outer contact pad of the first metallization structure. A first epoxy layer arranged on side faces and on the first surface of the transistor device includes openings which define a lateral size of the plurality of outer contact pads and a package footprint.
A method, comprising:
A method, comprising:
A method, comprising:
Dependencies are inferred from the claim text.