Package substrate and flip-chip package circuit including the same
AssigneePhoenix Pioneer Technology Co., Ltd.
InventorsChe-Wei Hsu, Shih-Ping Hsu
Life of this patent
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Abstract
This disclosure provides a package substrate, a flip-chip package circuit, and their fabrication methods. The package substrate includes: a first wiring layer having a first dielectric material layer and a first metal wire protruding from the first dielectric material layer; a conductive pillar layer formed on the first wiring layer and including a molding compound layer, a second dielectric material layer formed on the molding compound layer, and a metal pillar connected to the first metal wire; a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the metal pillar; and a protection layer formed on the second wiring layer.
Claims4
A method of fabricating a package substrate, comprising:
- (A) providing a carrier;
- (B) forming a first wiring layer on the carrier, wherein the first wiring layer includes a first metal wire with a first thickness and a first dielectric material layer with the first thickness, and the first metal wire is constructed with a photolithography process;
- (C) forming a conductive pillar layer on the first wiring layer, comprising a metal pillar, a molding compound layer, and a second dielectric material layer, wherein the metal pillar is constructed with the photolithography process and connected to the first metal wire, the molding compound layer and the second dielectric material layer are sequentially formed, the molding compound layer is placed above and covers the first wiring layer and the first dielectric material layer, the molding compound layer is also adjacent to the metal pillar and cover a lower portion of a side surface of the metal pillar, and the second dielectric material is placed above and covers the molding compound layer and the metal pillar, then the second dielectric material layer is partly removed for only covering an upper portion of the side surface of the metal pillar and for exposing a top surface of the metal pillars;
- (D) forming a second wiring layer including a second metal wire on the conductive pillar layer, wherein the second metal wire is constructed with the photolithography process and is connected to the metal pillar;
- (E) forming a protection layer on the second wiring layer to cover the second metal wire, and removing the carrier;
- and
- (F) removing a part of the first dielectric material layer for the first metal wire to protrude from the first dielectric material layer.
Dependencies are inferred from the claim text.