Semiconductor package and a method of manufacturing the same
AssigneeMagnaChip Semiconductor, Ltd.
InventorsJae Sik Choi, Dong Seong Oh, Si Hyeon Go
Life of this patent
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Abstract
A method to manufacture a semiconductor package includes: preparing a metal substrate; attaching semiconductor dies to the metal substrate at an interval; attaching a bonding film to the semiconductor dies; applying a mold material on the semiconductor dies and the metal substrate, and curing the mold material to form a mold member; grinding the mold member and the metal substrate to a thickness; removing the bonding film; attaching a redistribution layer to the semiconductor dies; and cutting between the semiconductor dies.
Claims16
A semiconductor package, comprising:
- a semiconductor die comprising a gate electrode and a source electrode on one surface of the semiconductor die and a drain electrode on the other surface of the semiconductor die;
- a redistribution layer comprising a gate metal pattern in contact with the gate electrode of the semiconductor die, a source metal pattern in contact with the source electrode of the semiconductor die, and an insulating layer disposed between the source metal pattern and the gate metal pattern,
- a metal substrate attached to the other surface of the semiconductor die;
- a mold member surrounding sides of the semiconductor die, and disposed between an inner surface of the metal substrate and the redistribution layer such that no mold member is disposed on an outer surface of the metal substrate;
- and
- a drain metal pattern in contact with the drain electrode and disposed on the outer surface of the metal substrate and the mold member.
A semiconductor package, comprising:
- a first semiconductor die and a second semiconductor die disposed on a substrate, respective semiconductor dies comprising a gate electrode and a source electrode disposed on one surface, and a drain electrode disposed on the other surface, of each semiconductor die;
- a first metal substrate attached to an upper surface of the first semiconductor die;
- a second metal substrate attached to an upper surface of the second semiconductor die;
- a first mold member disposed between the first semiconductor die and the second semiconductor die, and disposed between the first metal substrate and the second metal substrate;
- a drain metal pattern in contact with the drain electrode, and disposed on the first mold member, the first metal substrate and the second metal substrate;
- and
- a redistribution layer comprising a gate metal pattern in contact with the gate electrode of the respective semiconductor dies, a source metal pattern in contact with the source electrode of the respective semiconductor dies, and an insulating layer disposed between the source metal pattern and the gate metal pattern.
Dependencies are inferred from the claim text.