Chip package process

A chip package process, comprising:

• providing a supporting structure and a carrier plate, wherein the supporting structure has a plurality of openings, the supporting structure is disposed on the carrier plate, and the supporting structure is a continuous reticular structure;
• disposing a plurality of chips on the carrier plate, wherein the chips are respectively located in the openings of the supporting structure, each chip has an active surface, and the active surface is directly disposed on the carrier plate;
• forming an encapsulated material covering the supporting structure and the chips, wherein the supporting structure and the chips are located between the encapsulated material and the carrier plate, and the encapsulated material is filled between the openings and the chips;
• removing an entire part of the carrier plate;
• disposing a redistribution structure on the supporting structure, wherein the redistribution structure is connected to the chips, the supporting structure and the redistribution structure are substantially in contact with each other, and the entire supporting structure and the redistribution structure are electrically insulated from each other, wherein the reticular structure includes a single layer with a plurality of rectangular openings, and the chips are respectively located in the plurality of rectangular openings;
• and
• removing a portion of the encapsulated material to expose the chips, wherein, after the portion of the encapsulated material is removed, the supporting structure, the chips, and the encapsulated material are coplanar.