Methods of manufacturing an encapsulated semiconductor device

A method of manufacturing an electronic device, the method comprising:

• providing a substrate comprising:
• a first substrate side, a second substrate side opposite the first substrate side, and a plurality of lateral substrate sides that extend between the first substrate side and the second substrate side;
• and
• a first conductive layer at the first substrate side and comprising a plurality of conductive interconnects, where each of the conductive interconnects comprises a laterally outermost surface that is positioned laterally inward from an outermost periphery of the substrate;
• and
• a second conductive layer at the second substrate side and comprising a plurality of substrate lands;
• providing a die comprising:
• a first die side, a second die side opposite the first die side, and a plurality of lateral die sides that extend between the first die side and the second die side;
• and
• a plurality of pads;
• coupling the second die side to the first substrate side such that a first portion of each of the plurality of conductive interconnects is positioned outside of a footprint of the die, said coupling comprising coupling each of the plurality of pads of the die to a respective one of the plurality of conductive interconnects;
• and
• forming an encapsulant that covers at least the plurality of lateral die sides and the plurality of lateral substrate sides.

A method of manufacturing an electronic device, the method comprising:

• providing a substrate comprising:
• a first substrate side, a second substrate side opposite the first substrate side, and a plurality of lateral substrate sides that extend between the first substrate side and the second substrate side;
• a substrate structure comprising a dielectric layer;
• a substrate circuit pattern at the first substrate side, where the substrate circuit pattern comprises a first pattern surface that faces away from the first substrate side;
• a substrate land at the second substrate side;
• and
• a conductive via extending through the dielectric layer and electrically connecting the substrate circuit pattern and the substrate land;
• mounting a die on the first substrate side and connected to the substrate circuit pattern such that:
• a first portion of the substrate circuit pattern is positioned outside a footprint of the die;
• and
• a first portion of the first pattern surface is covered by an electrical connection between the first pattern surface and the die;
• and
• forming an encapsulant that encapsulates the die on the first substrate side and laterally surrounds an entirety of the lateral substrate sides, wherein:
• the encapsulant comprises a second encapsulant surface that faces the first substrate side, a first encapsulant surface opposite the second encapsulant surface, and a plurality of lateral encapsulant surfaces that extend between the first encapsulant surface and the second encapsulant surface;
• and
• the encapsulant covers at least an entirety of the first pattern surface other than the first portion of the first pattern surface,
• wherein said forming the encapsulant comprises forming the encapsulant such that:
• the substrate land is exposed from the encapsulant;
• the entire substrate land is laterally surrounded by the encapsulant;
• and
• the encapsulant does not extend lower than the substrate land.