Programming process which compensates for data state of adjacent memory cell in a memory device

A method, comprising:

• applying a program pulse to a selected word line during a program-verify iteration of a program operation, a selected memory cell in a NAND string is connected to the selected word line, an adjacent memory cell in the NAND string is connected to an adjacent word line of the selected word line, and the adjacent memory cell is programmed after the selected memory cell;
• applying a verification signal to the selected word line during the program-verify iteration;
• and
• during the applying of the verification signal, initiating sensing of whether a threshold voltage of the selected memory cell exceeds a level, the level is a function of a number of data states by which an assigned data state of the adjacent memory cell exceeds an assigned data state of the selected memory cell, wherein the level is a first level when the assigned data state of the adjacent memory cell is no more than a specified number of data states higher than the assigned data state of the selected memory cell, and the level is a second level which is lower than the first level when the assigned data state of the adjacent memory cell is more than the specified number of data states higher than the assigned data state of the selected memory cell.

An apparatus, comprising:

• a control circuit configured to connect to a group of series-connected memory cells and to one or more latches which are connected to the group of series-connected memory cells, the group of series-connected memory cells comprising a selected memory cell and an adjacent memory cell of the selected memory cell, the control circuit is configured to:
• compare an assigned data state of the selected memory cell to an assigned data state of the adjacent memory cell to obtain data indicating a number of data states by which the assigned data state of the adjacent memory cell exceeds the assigned data state of the selected memory cell;
• store the data in the one or more latches;
• program the selected memory cell by applying a program pulse to the selected memory cell followed by performing a verify test for the selected memory cell, where the verify test is responsive to the data;
• and
• program the adjacent memory cell after the programming of the selected memory cell.