Method of concurrent multi-state programming of non-volatile memory with bit line voltage step up

A memory controller, comprising:

• a first terminal coupled to a memory array;
• the memory controller configured to:
• apply a non-negative voltage on a first bit line coupled to a first memory cell in the memory array;
• apply a negative voltage on a second bit line coupled to a second memory cell in the memory array;
• apply a programming pulse to the first and second memory cells concurrently over a duration of time and wherein the negative voltage is applied to the second bit line during the duration of time and the non-negative voltage is applied to the first bit line during the duration of time;
• and in response,
• program the first and second memory cells to different states.

A non-volatile storage system, configured to concurrently program memory cells, comprising:

• a memory array including a first and second memory cells;
• a controller coupled to the memory array, wherein the controller is configured to:
• apply a non-negative voltage on a first bit line coupled to a first memory cell;
• apply a negative voltage on a second bit line coupled to the second memory cell, wherein the negative voltage is generated using triple-well technology;
• then
• apply a programming pulse to the first and second memory cells concurrently over a duration of time, wherein the negative voltage is applied to the second bit line during the duration of time and the non-negative voltage is applied to the first bit line during the duration of time;
• and in response,
• program the first and second memory cells to different states.